Intel P8700 Data Sheet - Page 64

Package Mechanical Specifications and Pin Information Table 16. Pin Name Listing Pin Name Pin # Signal Buffer Type Direction DSTBP[2]# AA26 DSTBP[3]# AF24 FERR# A5 GTLREF AD26 HIT# G6 HITM# E4 IERR# IGNNE# INIT# LINT0 LINT1 LOCK# D20 C4 B3 C6 B4 H4 PRDY# AC2 PREQ# AC1 PROCHOT# D21 PSI# PWRGOOD AE6 D6 REQ[0]# K3 REQ[1]# H2 REQ[2]# K2 REQ[3]# J3 REQ[4]# L1 RESET# C1 RS[0]# F3 Source Input/ Synch Output Source Input/ Synch Output Open Drain Output Power/ Other Input Common Input/ Clock Output Common Input/ Clock Output Open Drain Output CMOS Input CMOS Input CMOS Input CMOS Input Common Input/ Clock Output Common Clock Output Common Clock Input Open Drain Input/ Output CMOS Output CMOS Input Source Input/ Synch Output Source Input/ Synch Output Source Input/ Synch Output Source Input/ Synch Output Source Input/ Synch Output Common Clock Input Common Clock Input Table 16. Pin Name Listing Pin Name Pin # Signal Buffer Type Direction RS[1]# RS[2]# RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD RSVD SLP# SMI# STPCLK# TCK TDI TDO TEST1 TEST2 TEST3 TEST4 TEST5 TEST6 TEST7 THERMTRIP # THRMDA THRMDC TMS TRDY# TRST# VCC F4 G3 B2 D2 D3 D22 F6 M4 N5 T2 V3 D7 A3 D5 AC5 AA6 AB3 C23 D25 C24 AF26 AF1 A26 C3 C7 A24 B25 AB5 G2 AB6 A7 Common Clock Input Common Clock Input Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved Reserved CMOS Input CMOS Input CMOS Input CMOS Input CMOS Input Open Drain Output Test Test Test Test Test Test Test Open Drain Output Power/ Other Power/ Other CMOS Input Common Clock Input CMOS Input Power/ Other 64 Datasheet