Intel P8700 Data Sheet - Page 40

Electrical Specifications

40

Datasheet

NOTES:

See next page.

Table 11.

Voltage and Current Specifications for the Dual-Core, Ultra-Low-Voltage SFF

Processor

Symbol

Parameter

Min

Typ

Max

Unit

Notes

V

CCDAM

V

CC

in Enhanced Intel® Dynamic Acceleration

Technology Mode

0.8

—

1.1625

V

1, 2

V

CCHFM

V

CC

at Highest Frequency Mode (HFM)

0.775

—

1.1

V

1, 2

V

CCLFM

V

CC

at Lowest Frequency Mode (LFM)

0.8

—

0.975

V

1, 2

V

CCSLFM

V

CC

at Super Low Frequency Mode (Super LFM)

0.725

—

0.925

V

1, 2

V

CC,BOOT

Default V

CC

Voltage for Initial Power Up

—

1.20

—

V

2, 6, 8

V

CCP

AGTL+ Termination Voltage

1.00

1.05

1.10

V

V

CCA

PLL Supply Voltage

1.425

1.5

1.575

V

V

CCDPRSLP

V

CC

at Deeper Sleep

0.65

—

0.8

V

1, 2

V

DC4

V

CC

at Intel® Enhanced Deeper Sleep State

0.6

—

0.8

V

1, 2

V

CCDPPWDN

V

CC

at Deep Power Down Technology State (C6)

0.35

—

0.6

V

1, 2

I

CCDES

I

CC

for Processors Recommended Design Target

—

—

18

A

5

I

CC

Processor

Number

Core Frequency/Voltage

—

—

—

SU9600

SU9400

SU9300

1.6 GHz & V

CCHFM

1.4 GHz & V

CCHFM

1.2 GHz & V

CCHFM

1.2 GHz & V

CCLFM

0.8 GHz & V

CCSLFM

—

—

18

18

18

18

13

A

3, 4, 12

I

AH,

I

SGNT

I

CC

Auto-Halt & Stop-Grant

HFM

SuperLFM

—

—

6.3

4.4

A

3, 4, 12

I

SLP

I

CC

Sleep

HFM

SuperLFM

—

—

5.9

4.2

A

3, 4, 12

I

DSLP

I

CC

Deep Sleep

HFM

SuperLFM

—

—

5.0

3.7

A

3, 4, 12

I

DPRSLP

I

CC

Deeper Sleep

—

—

3.2

A

3, 4

I

DC4

I

CC

Intel Enhanced Deeper Sleep State

—

—

2.8

A

3, 4

I

DPWDN

I

CC

Deep Power Down Technology State (C6)

—

—

2.4

A

3, 4

dI

CC/

DT

V

CC

Power Supply Current Slew Rate at Processor

Package Pin

—

—

600

mA/μs

7, 9

I

CCA

I

CC

for V

CCA

Supply

—

—

130

mA

I

CCP

I

CC

for V

CCP

Supply before V

CC

Stable

I

CC

for V

CCP

Supply after V

CC

Stable

—

—

4.5

2.5

A

A

10

11

Section	Page
Intel® Core™2 Duo Mobile Processor, Intel® Core™2 Solo Mobile Processor and Intel® Core™2 Extreme Mobile Processor on 45-nm Process	1
Revision History	6
1 Introduction	7
1.1 Terminology	8
1.2 References	9
2 Low Power Features	11
2.1 Clock Control and Low-Power States	11
2.1.1 Core Low-Power State Descriptions	13
2.1.2 Package Low-power State Descriptions	15
2.2 Enhanced Intel SpeedStep® Technology	19
2.3 Extended Low-Power States	20
2.4 FSB Low Power Enhancements	21
2.4.1 Dynamic FSB Frequency Switching	21
2.4.2 Enhanced Intel® Dynamic Acceleration Technology	22
2.5 VID-x	23
2.6 Processor Power Status Indicator (PSI-2) Signal	23
3 Electrical Specifications	25
3.1 Power and Ground Pins	25
3.2 Decoupling Guidelines	25
3.2.1 VCC Decoupling	25
3.2.2 FSB AGTL+ Decoupling	25
3.2.3 FSB Clock (BCLK[1:0]) and Processor Clocking	25
3.3 Voltage Identification and Power Sequencing	26
3.4 Catastrophic Thermal Protection	29
3.5 Reserved and Unused Pins	29
3.6 FSB Frequency Select Signals (BSEL[2:0])	29
3.7 FSB Signal Groups	30
3.8 CMOS Signals	31
3.9 Maximum Ratings	31
3.10 Processor DC Specifications	32
4 Package Mechanical Specifications and Pin Information	51
4.1 Package Mechanical Specifications	51
4.2 Processor Pinout and Pin List	59
4.3 Alphabetical Signals Reference	93
5 Thermal Specifications and Design Considerations	101
5.1 Monitoring Die Temperature	108
5.1.1 Thermal Diode	108
5.1.2 Intel® Thermal Monitor	109
5.1.3 Digital Thermal Sensor	111
5.2 Out of Specification Detection	112

Intel P8700 Data Sheet - Page 40

Table 11., Voltage and Current Specifications for the Dual-Core, Ultra-Low-Voltage SFF, Processor

Page 40 highlights