Toshiba 50CT User Guide - Page 18
Hardware Overview, System Unit Block Diagram, BIOS ROM Flash EEPROM
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1 Hardware Overview 1.2 System Unit Block Diagram The system unit is composed of the following major components: q Microprocessor Libretto 50CT: Intel 75 MHz Pentium processor operates at 2.9/3.3 volts and incorporates the math co-processor and 16 KB cache memory. ∗Libretto 70CT: Intel 120 MHz Pentium processor with MMX technology operates at 2.9/3.3 volts and incorporates the math co-processor and 16 KB cache memory. q Standard RAM • 16 MB, eight 1M x 16-bit EDO DRAM chips • 3.3 volt operation • No parity bit • Access time 70 ns • Data transfer is 64-bit width q BIOS ROM (Flash EEPROM) • 256 KB, one 256K x 8-bit chip − 64 KB are used for system BIOS − 40 KB are used for VGA BIOS − 152 KB are reserved • Access time 120 ns • Data transfer is 8-bit width q Expansion memory One expansion memory slot is available for 8 and 16 MB memory kits, which consist of 1M x 16-bit EDO DRAM chips. • 3.3 volt operation • No parity bit • Access time 70 ns • Data transfer is 64-bit width q Video Controller Chips & Technologies F65550 is used. The video controller integrates an LCD/CRT graphics controller, RAMDAC, and clock synthesizers. q Video RAM • 1 MB, two 256K x 16-bit DRAM chips • 3.3 volt operation • Access time 50 ns Libretto 50CT/70CT Maintenance Manual 1-5
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