Compaq ProLiant 8500 ProLiant 8500 Servers Maintenance and Service Guide - Page 159

SW1 - SW4 Processor Board Bus/Core Frequency Ratio, Table 4-7, SW1-SW4 Bus/Core Frequency Ratio

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Connectors, Switches, and LED Indicators 4-7 SW1 - SW4 Processor Board Bus/Core Frequency Ratio Processor board bus/core frequency ratio switches can be set manually or by the system BIOS. Figure 4-5 shows the location of the processor board bus/core frequency ratio switches. Table 4-7 shows the bus/core frequency ratio switch settings. CAUTION: Setting the processor switchbanks incorrectly can result in permanent damage to the processor or in data loss. CAUTION: The server will NOT boot if Intel Pentium III Xeon 500/550-MHz processors and Pentium III Xeon 700-MHz or higher speed processors are installed in the same server. IMPORTANT: The bus/core switches come set at the Off position. This allows the ROM to automatically set the optimal speed for the buses. The server will not start if the switches are set to a speed higher than the slowest processor. NOTE: When all bus/core frequency switches are set to the OFF position, the system ROM will automatically set the bus/core frequency. Table 4-7 SW1-SW4 Bus/Core Frequency Ratio Bus/Core Frequency 500 550 700 ROM Default Ratio 5 5 ½ 7 2 SW 1 ON OFF ON OFF SW 2 OFF OFF OFF OFF SW 3 OFF OFF ON OFF SW 4 ON ON OFF OFF

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Connectors, Switches, and LED Indicators
4-7
SW1 - SW4 Processor Board Bus/Core Frequency Ratio
Processor board bus/core frequency ratio switches can be set manually or by the system BIOS.
Figure 4-5 shows the location of the processor board bus/core frequency ratio switches.
Table 4-7 shows the bus/core frequency ratio switch settings.
CAUTION:
Setting the processor switchbanks incorrectly can result in permanent damage to
the processor or in data loss.
CAUTION:
The server will NOT boot if Intel Pentium III Xeon 500/550-MHz processors and
Pentium III Xeon 700-MHz or higher speed processors are installed in the same server.
IMPORTANT:
The bus/core switches come set at the Off position. This allows the ROM to automatically
set the optimal speed for the buses. The server will not start if the switches are set to a speed higher
than the slowest processor.
NOTE:
When all bus/core frequency switches are set to the OFF position, the system ROM will
automatically set the bus/core frequency.
Table 4-7
SW1-SW4 Bus/Core Frequency Ratio
Bus/Core
Frequency
Ratio
SW 1
SW 2
SW 3
SW 4
500
5
ON
OFF
OFF
ON
550
5 ½
OFF
OFF
OFF
ON
700
7
ON
OFF
ON
OFF
ROM Default
2
OFF
OFF
OFF
OFF