Intel 521 Data Sheet - Page 32

Table 2-13. PWRGOOD and TAP Signal Group DC Specifications - vt

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Electrical Specifications Table 2-13. PWRGOOD and TAP Signal Group DC Specifications Symbol Parameter Min Max Unit Notes1, 2 VHYS VT+ Input Hysteresis Input low to high threshold voltage 200 350 mV 3 0.5 * (VTT + VHYS_MIN) 0.5 * (VTT + VHYS_MAX) V 4 VT- Input high to low threshold voltage 0.5 * (VTT - VHYS_MAX) 0.5 * (VTT - VHYS_MIN) V 4 VOH Output High Voltage N/A IOL Output Low Current - ILI Input Leakage Current - ILO Output Leakage Current - VTT 45 ± 200 ± 200 V 4 mA 5 µA 6 µA - RON Buffer On Resistance 7 12 Ω - NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. All outputs are open drain. 3. VHYS represents the amount of hysteresis, nominally centered about 0.5 * VTT, for all TAP inputs. 4. The VTT referred to in these specifications refers to instantaneous VTT. 5. The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test load. 6. Leakage to VSS with land held at VTT. Table 2-14. VTTPWRGD DC Specifications Symbol VIL VIH Parameter Input Low Voltage Input High Voltage Min Typ Max Unit - - 0.3 V 0.9 - - V Notes Table 2-15. BSEL [2:0] and VID[5:0] DC Specifications Symbol Parameter Max Unit Notes1, 2 RON (BSEL) Buffer On Resistance 60 Ω - RON (VID) Buffer On Resistance 60 Ω - IOL Max Land Current ILO Output Leakage Current 8 mA - 200 µA 3 VTOL Voltage Tolerance VTT (max) V - NOTES: 1. Unless otherwise noted, all specifications in this table apply to all processor frequencies. 2. These parameters are not tested and are based on design simulations. 3. Leakage to VSS with land held at 2.5 V. Table 2-16. BOOTSELECT DC Specifications Symbol Parameter Min Typ Max VIL Input Low Voltage - - VIH Input High Voltage 0.96 - NOTES: 1. These parameters are not tested and are based on design simulations. 0.24 - Unit V V Notes 1 - 32 Datasheet

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32
Datasheet
Electrical Specifications
Table 2-13. PWRGOOD and TAP Signal Group DC Specifications
Symbol
Parameter
Min
Max
Unit
Notes
1, 2
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
All outputs are open drain.
V
HYS
Input Hysteresis
200
350
mV
3
3.
V
HYS
represents the amount of hysteresis, nominally centered about 0.5 * V
TT
, for all TAP inputs.
V
T+
Input low to high
threshold voltage
0.5 * (V
TT
+
V
HYS_MIN)
0.5 * (V
TT
+
V
HYS_MAX
)
V
4
4.
The V
TT
referred to in these specifications refers to instantaneous V
TT
.
V
T-
Input high to low
threshold voltage
0.5 * (V
TT
–
V
HYS_MAX
)
0.5 * (V
TT
–
V
HYS_MIN
)
V
4
V
OH
Output High Voltage
N/A
V
TT
V
4
I
OL
Output Low Current
—
45
mA
5
5.
The maximum output current is based on maximum current handling capability of the buffer and is not specified into the test
load.
I
LI
Input Leakage Current
—
± 200
μA
6
6.
Leakage to V
SS
with land held at V
TT
.
I
LO
Output Leakage Current
—
± 200
μA
-
R
ON
Buffer On Resistance
7
12
Ω
-
Table 2-14. VTTPWRGD DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
V
IL
Input Low Voltage
—
—
0.3
V
V
IH
Input High Voltage
0.9
—
—
V
Table 2-15. BSEL [2:0] and VID[5:0] DC Specifications
Symbol
Parameter
Max
Unit
Notes
1
,
2
NOTES:
1.
Unless otherwise noted, all specifications in this table apply to all processor frequencies.
2.
These parameters are not tested and are based on design simulations.
R
ON
(BSEL)
Buffer On Resistance
60
Ω
—
R
ON
(VID)
Buffer On Resistance
60
Ω
—
I
OL
Max Land Current
8
mA
—
I
LO
Output Leakage Current
200
μA
3
3.
Leakage to V
SS
with land held at 2.5 V.
V
TOL
Voltage Tolerance
V
TT
(max)
V
—
Table 2-16. BOOTSELECT DC Specifications
Symbol
Parameter
Min
Typ
Max
Unit
Notes
V
IL
Input Low Voltage
—
—
0.24
V
1
NOTES:
1.
These parameters are not tested and are based on design simulations.
V
IH
Input High Voltage
0.96
—
—
V
—