Intel 521 Data Sheet - Page 57

Power/Other, RESERVED, Common Clock, Input/Output, Source Synch, Input, DSTBP1

Page 57 highlights

Land Listing and Signal Descriptions Table 4-2. Numerical Land Assignment Land # C24 C25 C26 C27 C28 C29 C30 D1 D2 D3 D4 D5 D6 D7 D8 D9 D10 D11 D12 D13 D14 D15 D16 D17 D18 D19 D20 D21 D22 D23 D24 D25 D26 D27 D28 D29 D30 E2 E3 E4 E5 Land Name VSS VTT VTT VTT VTT VTT VTT RESERVED ADS# VSS HIT# VSS VSS D20# D12# VSS D22# D15# VSS D25# RESERVED VSS RESERVED D49# VSS DBI2# D48# VSS D46# RESERVED VSS VTT VTT VTT VTT VTT VTT VSS TRDY# HITM# RESERVED Signal Buffer Type Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Direction Common Clock Input/Output Power/Other Common Clock Input/Output Power/Other Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Power/Other Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Power/Other Common Clock Input Common Clock Input/Output Table 4-2. Numerical Land Assignment Land # E6 E7 E8 E9 E10 E11 E12 E13 E14 E15 E16 E17 E18 E19 E20 E21 E22 E23 E24 E25 E26 E27 E28 E29 F2 F3 F4 F5 F6 F7 F8 F9 F10 F11 F12 F13 F14 F15 F16 F17 F18 Land Name RESERVED RESERVED VSS D19# D21# VSS DSTBP1# D26# VSS D33# D34# VSS D39# D40# VSS D42# D45# RESERVED RESERVED VSS VSS VSS VSS VSS FC5 BR0# VSS RS1# RESERVED VSS D17# D18# VSS D23# D24# VSS D28# D30# VSS D37# D38# Signal Buffer Type Direction Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Power/Other Power/Other Power/Other Power/Other Common Clock Input Common Clock Input/Output Power/Other Common Clock Input Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Power/Other Source Synch Input/Output Source Synch Input/Output Datasheet 57

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Land Listing and Signal Descriptions
Datasheet
57
C24
VSS
Power/Other
C25
VTT
Power/Other
C26
VTT
Power/Other
C27
VTT
Power/Other
C28
VTT
Power/Other
C29
VTT
Power/Other
C30
VTT
Power/Other
D1
RESERVED
D2
ADS#
Common Clock
Input/Output
D3
VSS
Power/Other
D4
HIT#
Common Clock
Input/Output
D5
VSS
Power/Other
D6
VSS
Power/Other
D7
D20#
Source Synch
Input/Output
D8
D12#
Source Synch
Input/Output
D9
VSS
Power/Other
D10
D22#
Source Synch
Input/Output
D11
D15#
Source Synch
Input/Output
D12
VSS
Power/Other
D13
D25#
Source Synch
Input/Output
D14
RESERVED
D15
VSS
Power/Other
D16
RESERVED
D17
D49#
Source Synch
Input/Output
D18
VSS
Power/Other
D19
DBI2#
Source Synch
Input/Output
D20
D48#
Source Synch
Input/Output
D21
VSS
Power/Other
D22
D46#
Source Synch
Input/Output
D23
RESERVED
D24
VSS
Power/Other
D25
VTT
Power/Other
D26
VTT
Power/Other
D27
VTT
Power/Other
D28
VTT
Power/Other
D29
VTT
Power/Other
D30
VTT
Power/Other
E2
VSS
Power/Other
E3
TRDY#
Common Clock
Input
E4
HITM#
Common Clock
Input/Output
E5
RESERVED
Table 4-2. Numerical Land Assignment
Land
#
Land Name
Signal Buffer
Type
Direction
E6
RESERVED
E7
RESERVED
E8
VSS
Power/Other
E9
D19#
Source Synch
Input/Output
E10
D21#
Source Synch
Input/Output
E11
VSS
Power/Other
E12
DSTBP1#
Source Synch
Input/Output
E13
D26#
Source Synch
Input/Output
E14
VSS
Power/Other
E15
D33#
Source Synch
Input/Output
E16
D34#
Source Synch
Input/Output
E17
VSS
Power/Other
E18
D39#
Source Synch
Input/Output
E19
D40#
Source Synch
Input/Output
E20
VSS
Power/Other
E21
D42#
Source Synch
Input/Output
E22
D45#
Source Synch
Input/Output
E23
RESERVED
E24
RESERVED
E25
VSS
Power/Other
E26
VSS
Power/Other
E27
VSS
Power/Other
E28
VSS
Power/Other
E29
VSS
Power/Other
F2
FC5
Common Clock
Input
F3
BR0#
Common Clock
Input/Output
F4
VSS
Power/Other
F5
RS1#
Common Clock
Input
F6
RESERVED
F7
VSS
Power/Other
F8
D17#
Source Synch
Input/Output
F9
D18#
Source Synch
Input/Output
F10
VSS
Power/Other
F11
D23#
Source Synch
Input/Output
F12
D24#
Source Synch
Input/Output
F13
VSS
Power/Other
F14
D28#
Source Synch
Input/Output
F15
D30#
Source Synch
Input/Output
F16
VSS
Power/Other
F17
D37#
Source Synch
Input/Output
F18
D38#
Source Synch
Input/Output
Table 4-2. Numerical Land Assignment
Land
#
Land Name
Signal Buffer
Type
Direction