Intel 521 Data Sheet - Page 85

Datasheet

85

Features

6

Features

6.1

Power-On Configuration Options

Several configuration options can be configured by hardware. The Pentium 4 processor in the 775-

land package samples the hardware configuration at reset, on the active-to-inactive transition of

RESET#. For specifications on these options, refer to

Table 6-1

.

The sampled information configures the processor for subsequent operation. These configuration

options cannot be changed except by another reset. All resets reconfigure the processor; for reset

purposes, the processor does not distinguish between a "warm" reset and a "power-on" reset.

Frequency determination functionality will exist on engineering sample processors which means

that samples can run at varied frequencies. Production material will have the bus to core ratio

locked and can only be operated at the rated frequency.

6.2

Clock Control and Low Power States

The processor allows the use of AutoHALT and Stop-Grant states to reduce power consumption by

stopping the clock to internal sections of the processor, depending on each particular state. See

Figure 6-1

for a visual representation of the processor low power states.

The processor adds support for the Enhanced HALT powerdown state. Refer to

Figure 6-1

and the

following sections.

Not all processors are capable of supporting the Enhanced HALT state. Refer to the Specification

Update to determine which processor stepping and frequencies will support the Enhanced HALT

state.

Table 6-1. Power-On Configuration Option Signals

Configuration Option

Signal

1, 2

NOTES:

1.

Asserting this signal during RESET# will select the corresponding option.

2.

Address signals not identified in this table as configuration options should not be asserted during RESET#.

Output tristate

SMI#

Execute BIST

INIT#

In Order Queue pipelining (set IOQ depth to 1)

A7#

Disable MCERR# observation

A9#

Disable BINIT# observation

A10#

APIC Cluster ID (0-3)

A[12:11]#

Disable bus parking

A15#

Disable Hyper-Threading Technology

A31#

Symmetric agent arbitration ID

BR0#

RESERVED

A[6:3]#, A8#, A[14:13]#, A[16:30]#, A[32:35]#

Section	Page
Contents	3
Revision History	7
Intel® Pentium® 4 Processors 570/571, 560/561, 550/551, 540/541, 530/531, and 520/521	9
1 Introduction	11
1.1 Terminology	12
1.1.1 Processor Packaging Terminology	12
1.2 References	13
2 Electrical Specifications	15
2.1 FSB and GTLREF	15
2.2 Power and Ground Lands	15
2.3 Decoupling Guidelines	15
2.3.1 VCC Decoupling	16
2.3.2 FSB GTL+ Decoupling	16
2.3.3 FSB Clock (BCLK[1:0]) and Processor Clocking	16
2.4 Voltage Identification	17
2.4.1 Phase Lock Loop (PLL) Power and Filter	19
2.5 Reserved, Unused, FC and TESTHI Signals	20
2.6 FSB Signal Groups	21
2.7 GTL+ Asynchronous Signals	22
2.8 Test Access Port (TAP) Connection	23
2.9 FSB Frequency Select Signals (BSEL[2:0])	23
2.10 Absolute Maximum and Minimum Ratings	24
2.11 Processor DC Specifications	24
2.12 VCC Overshoot Specification	33
2.12.1 Die Voltage Validation	33
2.13 GTL+ FSB Specifications	34
3 Package Mechanical Specifications	35
3.1 Package Mechanical Drawing	35
3.2 Processor Component Keep-Out Zones	39
3.3 Package Loading Specifications	39
3.4 Package Handling Guidelines	39
3.5 Package Insertion Specifications	40
3.6 Processor Mass Specification	40
3.7 Processor Materials	40
3.8 Processor Markings	40
3.9 Processor Land Coordinates	41
4 Land Listing and Signal Descriptions	43
4.1 Processor Land Assignments	43
4.2 Alphabetical Signals Reference	66
5 Thermal Specifications and Design Considerations	75
5.1 Processor Thermal Specifications	75
5.1.1 Thermal Specifications	75
5.1.2 Thermal Metrology	79
5.2 Processor Thermal Features	79
5.2.1 Thermal Monitor	79
5.2.2 Thermal Monitor 2	80
5.2.3 On-Demand Mode	81
5.2.4 PROCHOT# Signal	82
5.2.5 THERMTRIP# Signal	82
5.2.6 TCONTROL and Fan Speed Reduction	82
5.2.7 Thermal Diode	83
6 Features	85
6.1 Power-On Configuration Options	85
6.2 Clock Control and Low Power States	85
6.2.1 Normal State	86
6.2.2 HALT and Enhanced HALT Powerdown States	86
6.2.2.1 HALT Powerdown State	86
6.2.2.2 Enhanced HALT Powerdown State	86
6.2.3 Stop-Grant State	87
6.2.4 Enhanced HALT Snoop or HALT Snoop State, Grant Snoop State	88
6.2.4.1 HALT Snoop State, Grant Snoop State	88
6.2.4.2 Enhanced HALT Snoop State	88
7 Boxed Processor Specifications	89
7.1 Mechanical Specifications	90
7.1.1 Boxed Processor Cooling Solution Dimensions	90
7.1.2 Boxed Processor Fan Heatsink Weight	91
7.1.3 Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly	91
7.2 Electrical Requirements	91
7.2.1 Fan Heatsink Power Supply	91
7.3 Thermal Specifications	93
7.3.1 Boxed Processor Cooling Requirements	93

Intel 521 Data Sheet - Page 85

Features

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