Intel E3300 Data Sheet - Page 20

Symbol, Parameter, Notes

Page 20 highlights

Electrical Specifications Figure 1. 2.6.3 Table 6. Processor VCC Static and Transient Tolerance 0 VID - 0.000 VID - 0.013 VID - 0.025 VID - 0.038 VID - 0.050 VID - 0.063 VID - 0.075 VID - 0.088 VID - 0.100 VID - 0.113 VID - 0.125 VID - 0.138 VID - 0.150 VID - 0.163 VID - 0.175 VID - 0.188 Icc [A] 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 Vcc Maximum Vcc Typical Vcc Minimum NOTES: 1. The loadline specification includes both static and transient limits except for overshoot allowed as shown in Section 2.6.3. 2. This loadline specification shows the deviation from the VID set point. 3. The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE lands. Voltage regulation feedback for voltage regulator circuits must be taken from processor VCC and VSS lands. Refer to the Voltage Regulator Design Guide for socket loadline guidelines and VR implementation details. VCC Overshoot The processor can tolerate short transient overshoot events where VCC exceeds the VID voltage when transitioning from a high to low current load condition. This overshoot cannot exceed VID + VOS_MAX (VOS_MAX is the maximum allowable overshoot voltage). The time duration of the overshoot event must not exceed TOS_MAX (TOS_MAX is the maximum allowable time duration above VID). These specifications apply to the processor die voltage as measured across the VCC_SENSE and VSS_SENSE lands. VCC Overshoot Specifications Symbol Parameter Min Max Unit Figure Notes VOS_MAX Magnitude of VCC overshoot above VID - 50 mV 2 1 TOS_MAX Time duration of VCC overshoot above VID - 25 µs 2 1 NOTES: 1. Adherence to these specifications is required to ensure reliable processor operation. 20 Datasheet

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Electrical Specifications
20
Datasheet
NOTES:
1.
The loadline specification includes both static and transient limits except for overshoot allowed as shown in
Section 2.6.3
.
2.
This loadline specification shows the deviation from the VID set point.
3.
The loadlines specify voltage limits at the die measured at the VCC_SENSE and VSS_SENSE lands. Voltage
regulation feedback for voltage regulator circuits must be taken from processor VCC and VSS lands. Refer
to the Voltage Regulator Design Guide for socket loadline guidelines and VR implementation details.
2.6.3
V
CC
Overshoot
The processor can tolerate short transient overshoot events where V
CC
exceeds the VID
voltage when transitioning from a high to low current load condition. This overshoot
cannot exceed VID + V
OS_MAX
(V
OS_MAX
is the maximum allowable overshoot voltage).
The time duration of the overshoot event must not exceed T
OS_MAX
(T
OS_MAX
is the
maximum allowable time duration above VID). These specifications apply to the
processor die voltage as measured across the VCC_SENSE and VSS_SENSE lands.
Figure 1.
Processor V
CC
Static and Transient Tolerance
VID -
0.000
VID -
0.013
VID -
0.025
VID -
0.038
VID -
0.050
VID -
0.063
VID -
0.075
VID -
0.088
VID -
0.100
VID -
0.113
VID -
0.125
VID -
0.138
VID -
0.150
VID -
0.163
VID -
0.175
VID -
0.188
0
5
10
15
20
25
30
35
40
45
50
55
60
65
70
75
Icc [A]
Vcc Maximum
Vcc Typical
Vcc Minimum
Table 6.
V
CC
Overshoot Specifications
Symbol
Parameter
Min
Max
Unit
Figure
Notes
V
OS_MAX
Magnitude of V
CC
overshoot above
VID
50
mV
2
1
NOTES:
1.
Adherence to these specifications is required to ensure reliable processor operation.
T
OS_MAX
Time duration of V
CC
overshoot above
VID
25
μs
2
1