Intel E3300 Data Sheet - Page 82

Platform Environment Control Interface PECI

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Thermal Specifications and Design Considerations 5.3 Platform Environment Control Interface (PECI) 5.3.1 Introduction PECI offers an interface for thermal monitoring of Intel processor and chipset components. It uses a single wire, thus alleviating routing congestion issues. PECI uses CRC checking on the host side to ensure reliable transfers between the host and client devices. Also, data transfer speeds across the PECI interface are negotiable within a wide range (2 Kbps to 2 Mbps). The PECI interface on the processor is disabled by default and must be enabled through BIOS. More information can be found in the Platform Environment Control Interface (PECI) Specification. 5.3.1.1 Figure 16. TCONTROL and TCC activation on PECI-Based Systems Fan speed control solutions based on PECI use a TCONTROL value stored in the processor IA32_TEMPERATURE_TARGET MSR. The TCONTROL MSR uses the same offset temperature format as PECI though it contains no sign bit. Thermal management devices should infer the TCONTROL value as negative. Thermal management algorithms should use the relative temperature value delivered over PECI in conjunction with the TCONTROL MSR value to control or optimize fan speeds. Figure 16 shows a conceptual fan control diagram using PECI temperatures. The relative temperature value reported over PECI represents the delta below the onset of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the temperature approaches TCC activation, the PECI value approaches zero. TCC activates at a PECI count of zero. Conceptual Fan Control Diagram on PECI-Based Platforms 82 Datasheet

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Thermal Specifications and Design Considerations
82
Datasheet
5.3
Platform Environment Control Interface (PECI)
5.3.1
Introduction
PECI offers an interface for thermal monitoring of Intel processor and chipset
components. It uses a single wire, thus alleviating routing congestion issues. PECI uses
CRC checking on the host side to ensure reliable transfers between the host and client
devices. Also, data transfer speeds across the PECI interface are negotiable within a
wide range (2 Kbps to 2 Mbps). The PECI interface on the processor is disabled by
default and must be enabled through BIOS. More information can be found in the
Platform Environment Control Interface (PECI) Specification
.
5.3.1.1
T
CONTROL
and TCC activation on PECI-Based Systems
Fan speed control solutions based on PECI use a T
CONTROL
value stored in the processor
IA32_TEMPERATURE_TARGET MSR. The T
CONTROL
MSR uses the same offset
temperature format as PECI though it contains no sign bit. Thermal management
devices should infer the T
CONTROL
value as negative. Thermal management algorithms
should use the relative temperature value delivered over PECI in conjunction with the
T
CONTROL
MSR value to control or optimize fan speeds.
Figure 16
shows a conceptual
fan control diagram using PECI temperatures.
The relative temperature value reported over PECI represents the delta below the onset
of thermal control circuit (TCC) activation as indicated by PROCHOT# assertions. As the
temperature approaches TCC activation, the PECI value approaches zero. TCC activates
at a PECI count of zero.
Figure 16.
Conceptual Fan Control Diagram on PECI-Based Platforms