SanDisk SDCFH-004G Product Manual - Page 39

Table 3-17, Registers and Memory Space Decoding

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SanDisk CompactFlash Card OEM Product Manual Interface Description In addition, these registers provide a method for accessing status information about the card that may be used to arbitrate between multiple interrupt sources on the same interrupt level or to replace status information that appears on dedicated pins in memory cards that have alternate use in I/O cards. Table 3-17 Registers and Memory Space Decoding A8-CE2 -CE1 -REG -OE -WE A10 A9 A4 A3 A2 A1 A0 Selected Space 1 1 X X X X X XX X X X X Standby X 0 0 0 1 X 1 XX X X X 0 Configuration Registers Read 1 0 1 0 1 X X XX X X X X Common Memory Read (8-bit D7-D0) 0 1 1 0 1 X X XX X X X X Common Memory Read (8-bit D15-D8) 0 0 1 0 1 X X XX X X X 0 Common Memory Read (16-bit D15-D0) X 0 0 1 0 X 1 XX X X X 0 Configuration Registers Write 1 0 1 1 0 X X XX X X X X Common Memory Write (8- bit D7-D0) 0 1 1 1 0 X X XX X X X X Common Memory Write (8- bit D15-D8) 0 0 1 1 0 X X XX X X X 0 Common Memory Write (16-bit D15-D0) X 0 0 0 1 0 0 XX X X X 0 Card Info Structure Read 1 0 0 1 0 0 0 XX X X X 0 Invalid Access (CIS Write) 1 0 0 0 1 X X XX X X X 1 Invalid Access (Odd Attribute Read) 1 0 0 1 0 X X XX X X X 1 Invalid Access (Odd Attribute Write) 0 1 0 0 1 X X XX X X X X Invalid Access (Odd Attribute Read) 0 1 0 1 0 X X XX X X X X Invalid Access (Odd Attribute Write) NOTE: The location of the card configuration registers should always be read from the CIS since these locations may vary in future products. No writes should be performed to the card attribute memory except to the card configuration register addresses. All other attribute memory locations are reserved. © 2007 SanDisk Corporation 3-21 Rev. 12.0, 02/07

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SanDisk CompactFlash Card OEM Product Manual
Interface Description
In addition, these registers provide a method for accessing status information about the card
that may be used to arbitrate between multiple interrupt sources on the same interrupt level or
to replace status information that appears on dedicated pins in memory cards that have
alternate use in I/O cards.
Table 3-17
Registers and Memory Space Decoding
-CE2
1
-CE1
1
-REG
X
-OE
X
-WE
X
A10
X
A9
X
A8-
A4
XX
A3
X
A2
X
A1
X
A0
X
Selected Space
Standby
X
0
0
0
1
X
1
XX
X
X
X
0
Configuration Registers
Read
1
0
1
0
1
X
X
XX
X
X
X
X
Common Memory Read
(8-bit D7-D0)
0
1
1
0
1
X
X
XX
X
X
X
X
Common Memory Read
(8-bit D15-D8)
0
0
1
0
1
X
X
XX
X
X
X
0
Common Memory Read
(16-bit D15-D0)
X
0
0
1
0
X
1
XX
X
X
X
0
Configuration Registers
Write
1
0
1
1
0
X
X
XX
X
X
X
X
Common Memory Write (8-
bit D7-D0)
0
1
1
1
0
X
X
XX
X
X
X
X
Common Memory Write (8-
bit D15-D8)
0
0
1
1
0
X
X
XX
X
X
X
0
Common Memory Write
(16-bit D15-D0)
X
0
0
0
1
0
0
XX
X
X
X
0
Card Info Structure Read
1
0
0
1
0
0
0
XX
X
X
X
0
Invalid Access (CIS Write)
1
0
0
0
1
X
X
XX
X
X
X
1
Invalid Access (Odd
Attribute Read)
1
0
0
1
0
X
X
XX
X
X
X
1
Invalid Access (Odd
Attribute Write)
0
1
0
0
1
X
X
XX
X
X
X
X
Invalid Access (Odd
Attribute Read)
0
1
0
1
0
X
X
XX
X
X
X
X
Invalid Access (Odd
Attribute Write)
NOTE
:
The location of the card configuration registers should always be
read from the CIS since these locations may vary in future products.
No writes should be performed to the card attribute memory except
to the card configuration register addresses. All other attribute
memory locations are reserved.
© 2007 SanDisk Corporation
3-21
Rev. 12.0, 02/07