HP ProLiant DL185 HP ProLiant DL185 Generation 5 Server Software Configuration - Page 33

Beep code, Description, Test point 01Ah = 00 01 10 10 = 1-2-3-3 beeps

Page 33 highlights

3. Short beeps are generated for the number in each group. Example: Test point 01Ah = 00 01 10 10 = 1-2-3-3 beeps Table 22 lists the checkpoint codes written at the start of each test and the beep codes issued for terminal errors. Table 22 Beep codes and checkpoint codes Code 01h 02h 03h 04h 06h 07h 08h 09h 0Ah 0Bh 0Ch 0Eh 0Fh 10h 11h 12h 13h 14h 16h 17h 18h 1Ah 1Ch 20h 22h 24h 26h 28h Beep code 1-3-1-1 1-3-1-3 Description Initialize IPMI Verify real mode Disable non-maskable interrupts Get processor type Initialize system hardware Disable shadow and execute code from the ROM Initialize chipset with initial POST values Set IN POST flag Initialize processor registers Enable processor cache Initialize caches to initial POST values Initialize I/O component Initialize the local bus IDE Initialize power management Load alternate registers with initial POST values Restore processor control word during warm boot Initialize PCI bus mastering devices Initialize keyboard controller BIOS ROM checksum Initialize cache before memory auto size 8254 timer initialization 8237 DMA controller initialization Reset programmable interrupt controller Test DRAM refresh Test 8742 keyboard controller Set ES segment register to 4 GB Enable gate A20 line Autosize DRAM System BIOS configuration 33

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System BIOS configuration 33
3.
Short beeps are generated for the number in each group.
Example:
Test point 01Ah = 00 01 10 10 = 1-2-3-3 beeps
Table 22 lists the checkpoint codes written at the start of each test and the beep codes issued for
terminal errors.
Table
22
Beep codes and checkpoint codes
Code
Beep code
Description
01h
Initialize IPMI
02h
Verify real mode
03h
Disable non-maskable interrupts
04h
Get processor type
06h
Initialize system hardware
07h
Disable shadow and execute code from the ROM
08h
Initialize chipset with initial POST values
09h
Set IN POST flag
0Ah
Initialize processor registers
0Bh
Enable processor cache
0Ch
Initialize caches to initial POST values
0Eh
Initialize I/O component
0Fh
Initialize the local bus IDE
10h
Initialize power management
11h
Load alternate registers with initial POST values
12h
Restore processor control word during warm boot
13h
Initialize PCI bus mastering devices
14h
Initialize keyboard controller
16h
BIOS ROM checksum
17h
Initialize cache before memory auto size
18h
8254 timer initialization
1Ah
8237 DMA controller initialization
1Ch
Reset programmable interrupt controller
20h
1-3-1-1
Test DRAM refresh
22h
1-3-1-3
Test 8742 keyboard controller
24h
Set ES segment register to 4 GB
26h
Enable gate A20 line
28h
Autosize DRAM