Nintendo DMG-01 Manual - Page 32

Interrupts - gameboy serial #

Get Nintendo DMG-01 - Game Boy Console PDF manuals and user guides View all Nintendo DMG-01 manuals
Add to My Manuals
Save this manual to your list of manuals

Page 32 highlights

2.11. Serial I/O Game BoyTM CPU Manual allows a certain amount of synchronization with each serial port. The state of the last bit shifted out determines the state of the output line until another transfer takes place. If a serial transfer with internal clock is performed and no external GameBoy is present, a value of $FF will be received in the transfer. The following code causes $75 to be shifted out the serial port and a byte to be shifted into $FF01: ld a,$75 ld ($FF01),a ld a,$81 ld ($FF02),a 2.12. Interrupts 2.12.1. Interrupt Procedure The IME (interrupt master enable) flag is reset by DI and prohibits all interrupts. It is set by EI and acknowledges the interrupt setting by the IE register. 1. When an interrupt is generated, the IF flag will be set. 2. If the IME flag is set & the corresponding IE flag is set, the following 3 steps are performed. 3. Reset the IME flag and prevent all interrupts. 4. The PC (program counter) is pushed onto the stack. 5. Jump to the starting address of the interrupt. Page 32 V 1.01

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
2.11. Serial I/O
Game Boy
TM
CPU Manual
allows a certain amount of synchronization with each
serial port.
The state of the last bit shifted out determines the
state of the output line until another transfer takes
place.
If a serial transfer with internal clock is performed
and no external GameBoy is present, a value of $FF
will be received in the transfer.
The following code causes $75 to be shifted out the
serial port and a byte to be shifted into $FF01:
ld
a,$75
ld
($FF01),a
ld
a,$81
ld
($FF02),a
2.12.
Interrupts
2.12.1.
Interrupt Procedure
The IME (interrupt master enable) flag is reset by DI
and prohibits all interrupts. It is set by EI and
acknowledges the interrupt setting by the IE register.
1. When an interrupt is generated, the IF flag will be
set.
2. If the IME flag is set & the corresponding IE flag
is set, the following 3 steps are performed.
3. Reset the IME flag and prevent all interrupts.
4. The PC (program counter) is pushed onto the stack.
5. Jump to the starting address of the interrupt.
Page 32
V 1.01