Nintendo DMG-01 Manual - Page 53

used $FE00-$FE9F. The CPU cannot access - drivers

Page 53 highlights

Game BoyTM CPU Manual 2.13.1. I/O Registers Bit 6 - LYC=LY Coincidence (Selectable) Bit 5 - Mode 10 Bit 4 - Mode 01 Bit 3 - Mode 00 0: Non Selection 1: Selection Bit 2 - Coincidence Flag 0: LYC not equal to LCDC LY 1: LYC = LCDC LY Bit 1-0 - Mode Flag 00: During H-Blank 01: During V-Blank 10: During Searching OAM-RAM 11: During Transfering Data to LCD Driver STAT shows the current status of the LCD controller. Mode 00: When the flag is 00 it is the H-Blank period and the CPU can access the display RAM ($8000-$9FFF). Mode 01: When the flag is 01 it is the V-Blank period and the CPU can access the display RAM ($8000-$9FFF). Mode 10: When the flag is 10 then the OAM is being used ($FE00-$FE9F). The CPU cannot access the OAM during this period Mode 11: When the flag is 11 both the OAM and display RAM are being used. The CPU cannot access either during this period. The following are typical when the display is enabled: by DP Page 53

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Game Boy
TM
CPU Manual
2.13.1. I/O Registers
Bit 6 - LYC=LY Coincidence (Selectable)
Bit 5 - Mode 10
Bit 4 - Mode 01
Bit 3 - Mode 00
0: Non Selection
1: Selection
Bit 2 - Coincidence Flag
0: LYC not equal to LCDC LY
1: LYC = LCDC LY
Bit 1-0 - Mode Flag
00: During H-Blank
01: During V-Blank
10: During Searching OAM-RAM
11: During Transfering Data to
LCD Driver
STAT shows the current status of the LCD controller.
Mode 00: When the flag is 00 it is the H-Blank
period and the CPU can access the display
RAM ($8000-$9FFF).
Mode 01: When the flag is 01 it is the V-Blank
period and the CPU can access the display
RAM ($8000-$9FFF).
Mode 10: When the flag is 10 then the OAM is being
used ($FE00-$FE9F). The CPU cannot access
the OAM during this period
Mode 11: When the flag is 11 both the OAM and
display RAM are being used. The CPU cannot
access either during this period.
The following are typical when the display is
enabled:
by DP
Page 53