Nintendo DMG-01 Manual - Page 60
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2.13.1. I/O Registers Game BoyTM CPU Manual 43. FFFF (IE) Name - IE Contents - Interrupt Enable (R/W) Bit 4: Transition from High to Low of Pin number P10-P13. Bit 3: Serial I/O transfer complete Bit 2: Timer Overflow Bit 1: LCDC (see STAT) Bit 0: V-Blank 0: disable 1: enable Page 60 V 1.01
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2.13.1. I/O Registers
Game Boy
TM
CPU Manual
43.
FFFF (IE)
Name
- IE
Contents - Interrupt Enable (R/W)
Bit 4: Transition from High to Low of Pin
number P10-P13.
Bit 3: Serial I/O transfer complete
Bit 2: Timer Overflow
Bit 1: LCDC (see STAT)
Bit 0: V-Blank
0: disable
1: enable
Page 60
V 1.01