SanDisk SDSDH-1024 Product Manual - Page 26

Electrical Interface

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Revision 2.2 Chapter 3 - SD Card Interface Description SD Card Product Manual 3.3.1 Power Protection Same as in SD Card Bus Mode. 3.4 Electrical Interface The following sections provide valuable information about the electrical interface. 3.4.1 Power Up The power-up of the SD Card bus is handled locally, in each SD Card and in the bus master. Figure 3-5 Power-up Diagram Supply Voltage VDD max Bus master supply voltage VDD min Logic working level Valid voltage range for commands CMD0, 15, 55, and ACMD41 Valid voltage range for all other commands and memory access Power-up Supply Ramp-up Time Time time Timeout value for initialization process = 1 second Initialization Sequence ACMD NCC ACMD NCC 41 41 ACMD NCC 41 Initialization delay: the max. of 1 ms, 74 clock cycles and supply ramp- up time Optional repetitions of ACMD1 until no cards respond with busy bit set CMD2 After power up, including hot insertion (i.e., inserting a card when the bus is operating) the SD Card enters the idle state. During this state the SD Card ignores all bus transactions until ACMD41 is received (ACMD command type shall always precede with CMD55). ACMD41 is a special synchronization command used to negotiate the operation voltage range and to poll the cards until they are out of their power-up sequence. Besides the operation voltage profile of the cards, the response to ACMD41 contains a busy flag, indicating that the card is still working on its power-up procedure and is not ready for identification. This bit informs the host that the card is not ready. The host has to wait (and continue to poll the cards, each one on his turn) until this bit is cleared. The maximum period of power up procedure of single card shall not exceed one second. Getting individual cards, and the entire SD Card system, out of idle state is up to the responsibility of the bus master. Since the power up time and the supply ramp up time depend on application parameters such as the maximum number of SD Card s, the bus length and the power supply unit, the host must ensure that the power is built up to the operating level (the same level which will be specified in ACMD41) before ACMD41 is transmitted. © 2004 SanDisk Corporation 3-6 12/08/04

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Chapter 3 – SD Card Interface Description
Revision 2.2
SD Card Product Manual
© 2004 SanDisk Corporation
3-6
12/08/04
3.3.1
Power Protection
Same as in SD Card Bus Mode.
3.4
Electrical Interface
The following sections provide valuable information about the electrical interface.
3.4.1
Power Up
The power-up of the SD Card bus is handled locally, in each SD Card and in the bus
master.
Figure 3-5
Power-up Diagram
After power up, including hot insertion (i.e., inserting a card when the bus is operating) the
SD Card enters the idle state. During this state the SD Card ignores all bus transactions
until ACMD41 is received (ACMD command type shall always precede with CMD55).
ACMD41 is a special synchronization command used to negotiate the operation voltage
range and to poll the cards until they are out of their power-up sequence. Besides the
operation voltage profile of the cards, the response to ACMD41 contains a busy flag,
indicating that the card is still working on its power-up procedure and is not ready for
identification. This bit informs the host that the card is not ready. The host has to wait (and
continue to poll the cards, each one on his turn) until this bit is cleared. The maximum
period of power up procedure of single card shall not exceed one second.
Getting individual cards, and the entire SD Card system, out of idle state is up to the
responsibility of the bus master. Since the power up time and the supply ramp up time
depend on application parameters such as the maximum number of SD Card s, the bus
length and the power supply unit, the host must ensure that the power is built up to the
operating level (the same level which will be specified in ACMD41) before ACMD41 is
transmitted.
Power-up
Time
Supply Ramp-up
Time
Timeout value for initialization process = 1 second
time
Supply Voltage
V
DD
max
Bus master supply voltage
Logic working level
Initialization
Sequence
ACMD
41
Initialization delay:
the max. of 1 ms,
74 clock cycles
and supply ramp-
up time
Optional repetitions of ACMD1 until no
cards respond with busy bit set
ACMD
41
ACMD
41
CMD2
V
DD
min
N
CC
N
CC
N
CC
Valid voltage
range for all
other commands
and memory
access
Valid voltage
range for
commands CMD0,
15, 55, and
ACMD41