SanDisk SDSDH-1024 Product Manual - Page 87

Revision 2.2 Chapter 4 - SD Card Protocol Description SanDisk SD Card Product Manual Data Transfer Mode There is just one Z bit period followed by P bits pushed up by the responding card. This timing diagram is relevant for all responded host commands except CMD1, 2, 3. Command Response Timing (Data Transfer Mode) Host Command NCRCycles CMD S T Content CRC E Z Z P *** Response P S T Content CRC Z E Z Z Z Last Card Response-Next Host Command Timing After receiving the last card response, the host can start the next command transmission after at least NRC clock cycles. This timing is relevant for any host command. Timing Response End to Next CMD Start (Data Transfer Mode) Response CMD S T Content CRC E Z NRCCycles ****** Host Command Z S T Content CRCZ E Last Host Command-Next Host Command Timing After the last command has been sent, the host can continue sending the next command after at least NCC clock periods. Timing of Command Sequences (All modes) Host Command CMD S T Content CRC E Z NCCCycles ****** Host Command Z S T Content CRCZ E 4.11 Data Read Single Block Read The host selects one card for data read operation by CMD7 and sets the valid block length for block-oriented data transfer by CMD16. The basic bus timing for a read operation is shown in the Transfer of Single Block Read timing diagram. The sequence starts with a single block read command, CMD17 that specifies the start address in the argument field. The response is sent on the CMD line as usual. Transfer of Single Block Read CMD S T Content Cycles Response CRC E Z Z P *** P S T Content CRC E DAT Z Z Z **** NAC Cycles Z Z Z Z Z Z P ********** Read Data P S D D D *** Data transmission from the card starts after the access time delay NAC beginning from the end bit of the read command. After the last data bit, the CRC check bits are suffixed to allow the host to check for transmission errors. © 2004 SanDisk Corporation 4-43 12/08/04