SanDisk SDSDH-1024 Product Manual - Page 33

Card Specific Data CSD Register, read-only, one-time, programmable, erasable, Table 3-11, CSD

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Revision 2.2 Chapter 3 - SD Card Interface Description SD Card Product Manual 3.5.3 Card Specific Data Register The Card Specific Data (CSD) Register configuration information is required to access the card data. In Table 3-11, the Cell Type column defines the CSD field as read-only (R), one-time programmable (R/W) or erasable (R/W/E). The values are presented in "real world" units for each field and coded according to the CSD structure. Table 3-11 CSD Register Fields Field CSD_ STRUCTURE --- TAAC Width 2 6 8 Cell Type R R R CSD Slice [127: 126] [125: 120] [119: 112] CSD Value 1.0 --1.5 msec CSD Code Description 0 CSD structure 000000b Reserved 00100110 Data read access time-1 NSAC 8 R TRANS_ 8 R SPEED CCC 12 R READ_BL_ 4 R LEN READ_BL_ 1 R PARTIAL WRITE_BLK_ 1 R MISALIGN READ_BLK_ 1 R MISALIGN DSR_IMP 1 R --C_SIZE 2 R 12 R VDD_R_ 3 R CURR_MIN VDD_R_ 3 R CURR_MAX [111: 0 104] [103:96] Default 25MHz High-speed 50MHz [95:84] All (inc. WP, lock/unlock) [83:80] 2G Up to 1G [79:79] Yes [78:78] No [77:77] No [76:76] No [75:74] [73:62] [61:59] --- 2 GB 1 GB 512 MB 256 MB 128 MB 64 MB 32 MB 16 MB 100 mA [58:56] 80 mA 00000000b 0110010 01011010 Data read access time-2 in CLK cycles (NSAC*100) Max. data transfer rate 5F5 Ah 9h 1b 0b 0b 0b 00b F24h F22h F1Eh F13h F03h EDFh 74Bh 383h 111b 110b Card command classes Max. read data block length Partial blocks for read allowed Write block misalignment Read block misalignment DSR implemented Reserved Device size Max. read current @VDD min. Max. read current @VDD © 2004 SanDisk Corporation 3-13 12/08/04

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Chapter 3 – SD Card Interface Description
Revision 2.2
SD Card Product Manual
© 2004 SanDisk Corporation
3-13
12/08/04
3.5.3
Card Specific Data Register
The
Card Specific Data (CSD) Register
configuration information is required to access
the card data.
In Table 3-11, the
Cell Type
column defines the CSD field as
read-only
(R),
one-time
programmable
(R/W) or
erasable
(R/W/E). The values are presented in “real world” units
for each field and coded according to the CSD structure.
Table 3-11
CSD Register Fields
Field
Width
Cell
Type
CSD
Slice
CSD Value
CSD Code
Description
CSD_
STRUCTURE
2
R
[127:
126]
1.0
0
CSD structure
---
6
R
[125:
120]
---
000000b
Reserved
TAAC
8
R
[119:
112]
1.5 msec
00100110
Data read
access time-1
NSAC
8
R
[111:
104]
0
00000000b
Data read
access time-2 in
CLK cycles
(NSAC*100)
Default 25MHz
0110010
TRANS_
SPEED
8
R
[103:96]
High-speed
50MHz
01011010
Max. data
transfer rate
CCC
12
R
[95:84]
All (inc. WP,
lock/unlock)
5F5
Card command
classes
READ_BL_
LEN
4
R
[83:80]
2G
Up to 1G
Ah
9h
Max. read data
block length
READ_BL_
PARTIAL
1
R
[79:79]
Yes
1b
Partial blocks
for read allowed
WRITE_BLK_
MISALIGN
1
R
[78:78]
No
0b
Write block
misalignment
READ_BLK_
MISALIGN
1
R
[77:77]
No
0b
Read block
misalignment
DSR_IMP
1
R
[76:76]
No
0b
DSR
implemented
---
2
R
[75:74]
---
00b
Reserved
C_SIZE
12
R
[73:62]
2 GB
1 GB
512 MB
256 MB
128 MB
64 MB
32 MB
16 MB
F24h
F22h
F1Eh
F13h
F03h
EDFh
74Bh
383h
Device size
VDD_R_
CURR_MIN
3
R
[61:59]
100 mA
111b
Max. read
current @VDD
min.
VDD_R_
CURR_MAX
3
R
[58:56]
80 mA
110b
Max. read
current @VDD