Xerox 4540 Service Manual - Page 205

POST Codes, Generic Device Initialization Manager DIM - Disable all devices.

Page 205 highlights

TABLE B-2 POST Codes (Continued) Post Code 000e 8600 de00 8613 0024 862a 002a 042a 052a 122a 152a 252a 202c 002e 0033 0037 4538 5538 8600 Description Testing and initialization of input devices. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Preparing CPU for booting to OS by copying all the context of the BSP to all application processors present. NOTE: APs are left in the CLI HLT state. Preparing CPU for booting to OS by copying all the context of the BSP to all application processors present. NOTE: APs are left in the CLI HLT state. Initialize PM regs and PM PCI regs at Early-POST. Initialize multi-host bridge, if system supports it. Setup ECC options before memory clearing. Enable PCI-X clock lines in the 8131. Decompress and initialize any platform specific BIOS modules. BBS ROM initialization. Generic Device Initialization Manager (DIM) - Disable all devices. ISA PnP devices - Disable all devices. PCI devices - Disable all devices. ISA devices - Static device initialization. PCI devices - Static device initialization. PCI devices - Output device initialization. Initializing devices. Detecting and initializing the video adapter installed in the system that have optional ROMs. Initializing all the output devices. Initializing the silent boot module. Set the window for displaying text information. Displaying sign-on message, CPU information, setup key message, and any OEM-specific information. PCI devices - IPL device initialization. PCI devices - General device initialization. Preparing CPU for booting to OS by copying all the context of the BSP to all application processors present. NOTE: APs are left in the CLI HLT state. Appendix B BIOS POST Codes B-7

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
  • 176
  • 177
  • 178
  • 179
  • 180
  • 181
  • 182
  • 183
  • 184
  • 185
  • 186
  • 187
  • 188
  • 189
  • 190
  • 191
  • 192
  • 193
  • 194
  • 195
  • 196
  • 197
  • 198
  • 199
  • 200
  • 201
  • 202
  • 203
  • 204
  • 205
  • 206
  • 207
  • 208
  • 209
  • 210
  • 211
  • 212
  • 213
  • 214
  • 215
  • 216
  • 217
  • 218
  • 219
  • 220
  • 221
  • 222
  • 223
  • 224
  • 225
  • 226
  • 227
  • 228
  • 229
  • 230
  • 231
  • 232
  • 233
  • 234
  • 235
  • 236
  • 237
  • 238
  • 239
  • 240
  • 241
  • 242
  • 243
  • 244
  • 245
  • 246
  • 247
  • 248
  • 249
  • 250
  • 251
  • 252
  • 253
  • 254
  • 255
  • 256
  • 257
  • 258
  • 259
  • 260
  • 261
  • 262
  • 263
  • 264

Appendix B
BIOS POST Codes
B-7
000e
Testing and initialization of input devices. Traps the INT09h vector, so that the POST
INT09h handler gets control for IRQ1.
8600
Preparing CPU for booting to OS by copying all the context of the BSP to all application
processors present. NOTE: APs are left in the CLI HLT state.
de00
Preparing CPU for booting to OS by copying all the context of the BSP to all application
processors present. NOTE: APs are left in the CLI HLT state.
8613
Initialize PM regs and PM PCI regs at Early-POST. Initialize multi-host bridge, if system
supports it. Setup ECC options before memory clearing. Enable PCI-X clock lines in the
8131.
0024
Decompress and initialize any platform specific BIOS modules.
862a
BBS ROM initialization.
002a
Generic Device Initialization Manager (DIM) - Disable all devices.
042a
ISA PnP devices - Disable all devices.
052a
PCI devices - Disable all devices.
122a
ISA devices - Static device initialization.
152a
PCI devices - Static device initialization.
252a
PCI devices - Output device initialization.
202c
Initializing devices. Detecting and initializing the video adapter installed in the system
that have optional ROMs.
002e
Initializing all the output devices.
0033
Initializing the silent boot module. Set the window for displaying text information.
0037
Displaying sign-on message, CPU information, setup key message, and any OEM-specific
information.
4538
PCI devices - IPL device initialization.
5538
PCI devices - General device initialization.
8600
Preparing CPU for booting to OS by copying all the context of the BSP to all application
processors present. NOTE: APs are left in the CLI HLT state.
TABLE B-2
POST Codes
(Continued)
Post Code
Description