Xerox 4540 Service Manual - Page 207

POST Code Checkpoints, Extended BIOS Data Area from base memory.

Page 207 highlights

TABLE B-3 POST Code Checkpoints (Continued) Post Code 0E 13 20 24 30 2A 2C 2E 31 33 37 38 39 3A 3B 3C 40 50 52 60 Description Testing and initialization of input devices. Also, update the kernel variables. Traps the INT09h vector, so that the POST INT09h handler gets control for IRQ1. Decompress all available language, BIOS logo, and Silent logo modules. Initialize PM regs and PM PCI regs at Early-POST. Initialize multi-host bridge, if system supports it. Set up ECC options before clearing memory. REDIRECTION causes corrected data to written to RAM immediately. CHIPKILL provides 4-bit error det/corr of x4 type memory. Enable PCI-X clock lines in the 8131. Relocate all the CPUs to a unique SMBASE address. The BSP will be set to have its entry point at A000:0. If fewer than five CPU sockets are present on a board, subsequent CPUs entry points are separated by 8000h bytes. If more than four CPU sockets are present, entry points are separated by 200h bytes. CPU module is responsible for the relocation of the CPU to correct address. NOTE: APs are left in the INIT state. Decompress and initialize any platform-specific BIOS modules. Initialize System Management Interrupt. Initializes various devices through DIM. Initializes various devices. For all devices, assigns resources and initializes option ROM if required. Initializes all the output devices. Allocate memory for ADM module and decompress it. Give control to ADM module for initialization. Initialize language and font modules for ADM. Activate ADM module. Initializes the silent boot module. Set the window for displaying text information. Displaying sign-on message, CPU information, setup key message, and any OEM-specific information. Initializes various devices through DIM. Initializes DMAC-1 and DMAC-2. Initialize RTC date/time. Test for total memory installed in the system. Also, check for DEL or ESC keys to limit memory test. Display total memory in the system. By this point, RAM read/write test and the memory controller programming are complete. Detect various devices (parallel ports, serial ports, and coprocessor in CPU, etc.) successfully installed in the system and update the BDA, EBDA, etc. Programming the memory hole or any kind of implementation that needs an adjustment in system RAM size if necessary. Updates CMOS memory size from memory found in memory test. Allocates memory for Extended BIOS Data Area from base memory. Initializes NUM-LOCK status and programs the keyboard. Appendix B BIOS POST Codes B-9

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Appendix B
BIOS POST Codes
B-9
0E
Testing and initialization of input devices. Also, update the kernel variables. Traps the
INT09h vector, so that the POST INT09h handler gets control for IRQ1. Decompress all
available language, BIOS logo, and Silent logo modules.
13
Initialize PM regs and PM PCI regs at Early-POST. Initialize multi-host bridge, if system
supports it. Set up ECC options before clearing memory. REDIRECTION causes corrected
data to written to RAM immediately. CHIPKILL provides 4-bit error det/corr of x4 type
memory. Enable PCI-X clock lines in the 8131.
20
Relocate all the CPUs to a unique SMBASE address. The BSP will be set to have its entry
point at A000:0. If fewer than five CPU sockets are present on a board, subsequent CPUs
entry points are separated by 8000h bytes. If more than four CPU sockets are present,
entry points are separated by 200h bytes. CPU module is responsible for the relocation of
the CPU to correct address. NOTE: APs are left in the INIT state.
24
Decompress and initialize any platform-specific BIOS modules.
30
Initialize System Management Interrupt.
2A
Initializes various devices through DIM.
2C
Initializes various devices. For all devices, assigns resources and initializes option ROM if
required.
2E
Initializes all the output devices.
31
Allocate memory for ADM module and decompress it. Give control to ADM module for
initialization. Initialize language and font modules for ADM. Activate ADM module.
33
Initializes the silent boot module. Set the window for displaying text information.
37
Displaying sign-on message, CPU information, setup key message, and any OEM-specific
information.
38
Initializes various devices through DIM.
39
Initializes DMAC-1 and DMAC-2.
3A
Initialize RTC date/time.
3B
Test for total memory installed in the system. Also, check for DEL or ESC keys to limit
memory test. Display total memory in the system.
3C
By this point, RAM read/write test and the memory controller programming are complete.
40
Detect various devices (parallel ports, serial ports, and coprocessor in CPU, etc.)
successfully installed in the system and update the BDA, EBDA, etc.
50
Programming the memory hole or any kind of implementation that needs an adjustment
in system RAM size if necessary.
52
Updates CMOS memory size from memory found in memory test. Allocates memory for
Extended BIOS Data Area from base memory.
60
Initializes NUM-LOCK status and programs the keyboard.
TABLE B-3
POST Code Checkpoints
(Continued)
Post Code
Description