Intel SL8K2 Specification Update - Page 11

Summary Tables of Changes R NO. C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA R24 X PWRGOOD and TAP Signals Fixed Maximum Input Hysteresis Higher Than Specified R25 X X X Fixed Incorrect Physical Address Size Returned by CPUID Instruction R26 X X X X X X X X X No Fix Incorrect Debug Exception (#DB) May Occur When a Data Breakpoint is set on an FP Instruction R27 X X X X X X X X X No xAPIC May Not Report Some Illegal Fix Vector Errors R28 X X X X X Fixed Enabling No-Eviction Mode (NEM) May Prevent the Operation of the Second Logical Processor in a Hyper-Threading Technology Enabled Processor Incorrect Duty Cycle is Chosen R29 X X X X X X X X X No Fix when On-Demand Clock Modulation is Enabled in a Processor Supporting Hyper- Threading Technology Memory Aliasing of Pages as R30 X X X X X X X X X No Uncacheable Memory Type and Fix Write Back (WB) May Hang the System Interactions Between the Instruction R31 X X X X X X X X X No Fix Translation Lookaside Buffer (ITLB) and the Instruction Streaming Buffer May Cause Unpredictable Software Behavior R32 X STPCLK# Signal Assertion under Fixed Certain Conditions May Cause a System Hang R33 X Missing Stop Grant Fixed Acknowledge Special Bus Cycle May Cause a System Hang R34 X Changes to CR3 Register do not Fixed Fence Pending Instruction Page Walks R35 X Fixed Simultaneous Page Faults at Similar Page Offsets on Both Logical Processors of a HyperThreading Technology Enabled Processor May Cause Application Failure R36 X The State of the Resume Flag (RF Fixed Flag) in a Task-State Segment (TSS) May be Incorrect R37 X X X X X X X X X No Fix Using STPCLK# and Executing Code From Very Slow Memory Could Lead to a System Hang Intel® Pentium® 4 Processor on 90 nm Process Specification Update 11