Intel SL8K2 Specification Update - Page 68

Errata R R111. FS/GS Base MSRs can be Loaded from MSR-Load Areas during VM Entry or VM Exit Problem: If the VM Exit or VM Entry MSR load area contains references to the FS or GS Base MSRs, the VM Exit and VM Entry transitions should fail. Instead, the operation will load the MSRs with the value in the corresponding MSR-load area entry. Implication: VM Entries and VM Exits that should fail will complete successfully in this situation. If a VM entry is to virtual-8086 mode, the base address for FS or for GS may be loaded with a value that is not consistent with that mode. Intel has not observed this erratum with any commercially available software or systems. Workaround: Software should not enter values in the MSR-load areas that correspond to either the FS Base MSR or the GS Base MSR. Software can establish the value of these registers on VM entry using the guest-state area of the Virtual-Machine Control Structure (VMCS) and on VM exit using the host-state area of the VMCS. Status: For the steppings affected, see the Summary Tables of Changes. R112. NMI-blocking Information Recorded in VMCS May be Incorrect after a #GP on an IRET Instruction Problem: In a system supporting Intel® Virtualization Technology, the NMI blocking bit in the InterruptionInformation Field in the guest VMCS may be set incorrectly. This erratum will happen if a VMExit occurs for a #GP fault on an IRET instruction due to an EIP that violates the segment limit or is non-canonical. Implication: If this erratum occurs, monitor software may not be able to handle #GP and then inject an NMI since monitor software does not have information about whether NMIs are blocked in the guest. Workaround: Monitor software can workaround this bug by avoiding injection of NMI after #GP emulation. Status: For the steppings affected, see the Summary Tables of Changes. R113. VMLAUNCH/VMRESUME May Not Fail when VMCS is Programmed to Cause VM Exit to Return to a Different Mode Problem: VMLAUNCH/VMRESUME instructions may not fail if the value of the "host address-space size" VM-exit control differs from the setting of IA32_EFER.LMA. Implication: Programming the VMCS to allow the monitor to be in different modes prior to VMLAUNCH/VMRESUME and after VM-exit may result in undefined behavior. Workaround: Software should ensure that "host address-space size" VM-exit control has the same value as IA32_EFER.LMA at the time of VMLAUNCH/VMRESUME. Status: For the steppings affected, see the Summary Tables of Changes. 68 Intel® Pentium® 4 Processor on 90 nm Process Specification Update