Intel SL8K2 Specification Update - Page 46
MOV CR3 Performs Incorrect Reserved Bit Checking When in PAE Paging
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Errata R R40. CPUID Instruction May Report Incorrect L2 Associativity in Leaf 0x80000006 Problem: L2 associativity reported by CPUID with EAX=80000006H instruction may be incorrect. Implication: Software may see an incorrect L2 associativity when viewed via CPUID with EAX=80000006H, however, when viewed via CPUID with EAX=4H, the associativity value is correct. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. R41. The FP_ASSIST EMON Event May Return an Incorrect Count Problem: The performance monitoring event, FP_ASSIST, may incorrectly calculate the number of events if denormals or SSE loads are encountered. Implication: When this erratum occurs, the FP_ASSIST event may not calculate the correct number of events. As a result, performance optimization software such as Intel VTune™ Performance Analyzers may not be able to take advantage of certain scenarios. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. R42. Machine Check Exceptions May not Update Last-Exception Record MSRs (LERs) Problem: The Last-Exception Record MSRs (LERs) may not get updated when Machine Check Exceptions occur. Implication: When this erratum occurs, the LER may not contain information relating to the machine check exception. They will contain information relating to the exception prior to the machine check exception. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. R43. MOV CR3 Performs Incorrect Reserved Bit Checking When in PAE Paging Problem: The MOV CR3 instruction should perform reserved bit checking on the upper unimplemented address bits. This checking range should match the address width reported by CPUID instruction 0x8000008. This erratum applies whenever PAE is enabled. Implication: Software that sets the upper address bits on a MOV CR3 instruction and expects a fault may fail. This erratum has not been observed with commercially available software. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. 46 Intel® Pentium® 4 Processor on 90 nm Process Specification Update