Intel SL8K2 Specification Update - Page 50

Upper 32 Bits of FS/GS with Null Base May Not Get Cleared in Virtual-8086

Page 50 highlights

Errata R R56. The Base of a Null Segment May Be Non-zero on a Processor Supporting Intel® Extended Memory 64 Technology (Intel® EM64T) Problem: In IA-32e mode of the Intel EM64T processor, the base of a null segment may be non-zero. Implication: Due to this erratum, Intel EM64T enabled systems may encounter unexpected behavior when accessing memory using the null selector. Workaround: It is possible for the BIOS to contain a workaround for this erratum. Status: For the steppings affected, see the Summary Tables of Changes. R57. Upper 32 Bits of FS/GS with Null Base May Not Get Cleared in Virtual-8086 Mode on Processors with Intel® Extended Memory 64 Technology (Intel® EM64T) Enabled Problem: For processors with Intel EM64T enabled, the upper 32 bits of the FS and GS data segment registers corresponding to a null base may not get cleared when segments are loaded in Virtual8086 mode. Implication: This erratum may cause incorrect data to be loaded or stored to memory if FS/GS is not initialized before use in 64-bit mode. Intel has not observed this erratum with any commercially available software. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. R58. Processor May Fault When the Upper 8 Bytes of Segment Selector Is Loaded from a Far Jump through a Call Gate via the Local Descriptor Table Problem: In IA-32e mode of the Intel EM64T processor, control transfers through a call gate via the Local Descriptor Table (LDT) that uses a 16-byte descriptor, the upper 8-byte access may wrap and access an incorrect descriptor in the LDT. This only occurs on an LDT with a LIMIT>0x10008 with a 16-byte descriptor that has a selector of 0xFFFC. Implication: In the event this erratum occurs, the upper 8-byte access may wrap and access an incorrect descriptor within the LDT, potentially resulting in a fault or system hang. Intel has not observed this erratum with any commercially available software. Workaround: None identified. Status: For the steppings affected, see the Summary Tables of Changes. 50 Intel® Pentium® 4 Processor on 90 nm Process Specification Update

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Errata
R
50
Intel
®
Pentium
®
4 Processor on 90 nm Process Specification Update
R56.
The Base of a Null Segment May Be Non-zero on a Processor Supporting
Intel
®
Extended Memory 64 Technology (Intel
®
EM64T)
Problem:
In IA-32e mode of the Intel EM64T processor, the base of a null segment may be non-zero.
Implication:
Due to this erratum, Intel EM64T enabled systems may encounter unexpected behavior when
accessing memory using the null selector.
Workaround:
It is possible for the BIOS to contain a workaround for this erratum.
Status:
For the steppings affected, see the
Summary Tables of Changes
.
R57.
Upper 32 Bits of FS/GS with Null Base May Not Get Cleared in Virtual-8086
Mode on Processors with Intel
®
Extended Memory 64 Technology (Intel
®
EM64T) Enabled
Problem:
For processors with Intel EM64T enabled, the upper 32 bits of the FS and GS data segment
registers corresponding to a null base may not get cleared when segments are loaded in Virtual-
8086 mode.
Implication:
This erratum may cause incorrect data to be loaded or stored to memory if FS/GS is not initialized
before use in 64-bit mode.
Intel has not observed this erratum with any commercially available
software.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes
.
R58.
Processor May Fault When the Upper 8 Bytes of Segment Selector Is
Loaded from a Far Jump through a Call Gate via the Local Descriptor Table
Problem:
In IA-32e mode of the Intel EM64T processor, control transfers through a call gate via the Local
Descriptor Table (LDT) that uses a 16-byte descriptor, the upper 8-byte access may wrap and
access an incorrect descriptor in the LDT. This only occurs on an LDT with a LIMIT>0x10008
with a 16-byte descriptor that has a selector of 0xFFFC.
Implication:
In the event this erratum occurs, the upper 8-byte access may wrap and access an incorrect
descriptor within the LDT, potentially resulting in a fault or system hang. Intel has not observed
this erratum with any commercially available software.
Workaround:
None identified.
Status:
For the steppings affected, see the
Summary Tables of Changes
.