Intel SL8K2 Specification Update - Page 17

Summary Tables of Changes R NO. C01 D0 LD02 E0 LE02 G11 LG12 LN02 LR02 Plan ERRATA Writing the Local Vector Table R98 X X X X X X X X X No (LVT) when an Interrupt is Pending Fix May Cause an Unexpected Interrupt Access to an Unsupported Address Range in Uniprocessor (UP) or R99 X No Dual-processor (DP) Systems Fix Supporting Intel® Virtualization Technology May Not Trigger Appropriate Actions R100 X No Fix VM Exit Due to a MOV from CR8 May Cause an Unexpected Memory Access R101 X No Fix The Processor May Incorrectly Respond to Machine Checks during VM Entry/Exit Transitions R102 INIT during String Operations in the X No Virtual-Machine Extension (VMX) Fix Guest Mode May Cause Unexpected System Behavior R103 Power Down Requests May not be X No Fix Serviced if a Power Down Transition is Interrupted by an InTarget Probe Event in the Presence of a Specific Type of VM Exit R104 VM EXIT Due to TPR shadow X No Below Threshold May Improperly Fix Set and Cause "Blocking by STI" actions R105 VM Entry/Exit Writes to X No LSTAR/SYSCALL_FLAG MSR's Fix May Cause Incorrect Data to be Written to Bits [63:32] R106 X No Fix Machine Check Architecture Multiple Data Parity Errors May be Reported R107 Attempting to Use an LDT Entry X Plan Fix when the LDTR Has Been Loaded with an Unusable Segment May Cause Unexpected Memory Accesses R108 X No Fix The Execution of a VMPTRLD Instruction May Cause an Unexpected Memory Access R109 X No Fix The Execution of VMPTRLD or VMREAD May Cause an Unexpected Memory Access R110 X X X X X No Fix IRET under Certain Conditions May Cause an Unexpected Alignment Check Exception Intel® Pentium® 4 Processor on 90 nm Process Specification Update 17