IBM DJSA-210 Hard Drive Specifications - Page 56

Signal definitions

Page 56 highlights

7.3 Signal definitions The pin assignments of interface signals are listed as follows: PIN SIGNAL I/O Type PIN SIGNAL I/O 01 -RESET I TTL 02 GND 03 DD07 I/O 3-state 04 DD08 I/O 05 DD06 I/O 3-state 06 DD09 I/O 07 DD05 I/O 3-state 08 DD10 I/O 09 DD04 I/O 3-state 10 DD11 I/O 11 DD03 I/O 3-state 12 DD12 I/O 13 DD02 I/O 3-state 14 DD13 I/O 15 DD01 I/O 3-state 16 DD14 I/O 17 DD00 I/O 3-state 18 DD15 I/O 19 GND (20) Key 21 DMARQ O 3-state 22 GND 23 -DIOW(*) I TTL 24 GND 25 -DIOR(*) I TTL 26 GND 27 IORDY(*) O OD 28 CSEL I 29 -DMACK I TTL 30 GND 31 INTRQ O 3-state 32 -IOCS16(*) O 33 DA01 I TTL 34 -PDIAG I/O 35 DA00 I TTL 36 DA02 I 37 -CS0 I TTL 38 -CS1 I 39 -DASP I/O OD 40 GND 41 + 5V logic power 42 + 5V motor power 43 GND 44 (reserved) Type 3-state 3-state 3-state 3-state 3-state 3-state 3-state 3-state TTL OD OD TTL TTL Notes: 1. "O" designates an output from the Drive. 2. "I" designates an input to the Drive. 3. "I/O" designates an input/output common. 4. "OD" designates an Open-Drain output. 5. The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special functions. These lines change from the conventional to special definitions at the moment the Host decides to allow a DMA burst, if the Ultra DMA transfer mode was previously chosen via SetFeatures. The Drive becomes aware of this change upon assertion of the -DMACK line. These lines revert back to their original definitions upon the deassertion of DMACK at the termination of the DMA burst. 6. "power" designates a power supply to the drive. 7. "reserved" designates reserved pins which must be left unconnected. Figure 33. Table of signals Travelstar 32GH/30GT/20GN hard disk drive specifications 42

  • 1
  • 2
  • 3
  • 4
  • 5
  • 6
  • 7
  • 8
  • 9
  • 10
  • 11
  • 12
  • 13
  • 14
  • 15
  • 16
  • 17
  • 18
  • 19
  • 20
  • 21
  • 22
  • 23
  • 24
  • 25
  • 26
  • 27
  • 28
  • 29
  • 30
  • 31
  • 32
  • 33
  • 34
  • 35
  • 36
  • 37
  • 38
  • 39
  • 40
  • 41
  • 42
  • 43
  • 44
  • 45
  • 46
  • 47
  • 48
  • 49
  • 50
  • 51
  • 52
  • 53
  • 54
  • 55
  • 56
  • 57
  • 58
  • 59
  • 60
  • 61
  • 62
  • 63
  • 64
  • 65
  • 66
  • 67
  • 68
  • 69
  • 70
  • 71
  • 72
  • 73
  • 74
  • 75
  • 76
  • 77
  • 78
  • 79
  • 80
  • 81
  • 82
  • 83
  • 84
  • 85
  • 86
  • 87
  • 88
  • 89
  • 90
  • 91
  • 92
  • 93
  • 94
  • 95
  • 96
  • 97
  • 98
  • 99
  • 100
  • 101
  • 102
  • 103
  • 104
  • 105
  • 106
  • 107
  • 108
  • 109
  • 110
  • 111
  • 112
  • 113
  • 114
  • 115
  • 116
  • 117
  • 118
  • 119
  • 120
  • 121
  • 122
  • 123
  • 124
  • 125
  • 126
  • 127
  • 128
  • 129
  • 130
  • 131
  • 132
  • 133
  • 134
  • 135
  • 136
  • 137
  • 138
  • 139
  • 140
  • 141
  • 142
  • 143
  • 144
  • 145
  • 146
  • 147
  • 148
  • 149
  • 150
  • 151
  • 152
  • 153
  • 154
  • 155
  • 156
  • 157
  • 158
  • 159
  • 160
  • 161
  • 162
  • 163
  • 164
  • 165
  • 166
  • 167
  • 168
  • 169
  • 170
  • 171
  • 172
  • 173
  • 174
  • 175
  • 176
  • 177
  • 178
  • 179
  • 180
  • 181
  • 182
  • 183
  • 184
  • 185
  • 186
  • 187
  • 188
  • 189
  • 190
  • 191
  • 192
  • 193
  • 194
  • 195
  • 196
  • 197
  • 198
  • 199
  • 200
  • 201
  • 202
  • 203
  • 204
  • 205
  • 206
  • 207
  • 208
  • 209
  • 210
  • 211

7.3 Signal definitions
The pin assignments of interface signals are listed as follows:
(reserved)
44
GND
43
power
+ 5V motor
42
power
+ 5V logic
41
GND
40
OD
I/O
–DASP
39
TTL
I
–CS1
38
TTL
I
–CS0
37
TTL
I
DA02
36
TTL
I
DA00
35
OD
I/O
–PDIAG
34
TTL
I
DA01
33
OD
O
–IOCS16(*)
32
3–state
O
INTRQ
31
GND
30
TTL
I
–DMACK
29
TTL
I
CSEL
28
OD
O
IORDY(*)
27
GND
26
TTL
I
–DIOR(*)
25
GND
24
TTL
I
–DIOW(*)
23
GND
22
3–state
O
DMARQ
21
Key
(20)
GND
19
3–state
I/O
DD15
18
3–state
I/O
DD00
17
3–state
I/O
DD14
16
3–state
I/O
DD01
15
3–state
I/O
DD13
14
3–state
I/O
DD02
13
3–state
I/O
DD12
12
3–state
I/O
DD03
11
3–state
I/O
DD11
10
3–state
I/O
DD04
09
3–state
I/O
DD10
08
3–state
I/O
DD05
07
3–state
I/O
DD09
06
3–state
I/O
DD06
05
3–state
I/O
DD08
04
3–state
I/O
DD07
03
GND
02
TTL
I
–RESET
01
Type
I/O
SIGNAL
PIN
Type
I/O
SIGNAL
PIN
Notes:
1.
"O" designates an output from the Drive.
2.
"I" designates an input to the Drive.
3.
"I/O" designates an input/output common.
4.
"OD" designates an Open-Drain output.
5.
The signal lines marked with (*) are redefined during the Ultra DMA protocol to provide special
functions. These lines change from the conventional to special definitions at the moment the Host
decides to allow a DMA burst, if the Ultra DMA transfer mode was previously chosen via
SetFeatures. The Drive becomes aware of this change upon assertion of the -DMACK line. These
lines revert back to their original definitions upon the deassertion of DMACK at the termination of
the DMA burst.
6.
"power" designates a power supply to the drive.
7.
"reserved" designates reserved pins which must be left unconnected.
Figure 33. Table of signals
Travelstar 32GH/30GT/20GN hard disk drive specifications
42