IBM DJSA-210 Hard Drive Specifications - Page 79

Registers, A = Signal asserted

Page 79 highlights

10.0 Registers Addresses Functions CS0- CS1- DA2 DA1 DA0 READ (DIOR-) WRITE (DIOW-)) N N x x x Data bus high imped Not used Control block registers N A 0 x x Data bus high imped Not used N A 1 0 x Data bus high imped Not used N A 1 1 0 Alternate Status Device Control N A 1 1 1 Device Address Not used Command block registers A N 0 0 0 Data Data A N 0 0 1 Error Register Features A N 0 1 0 Sector Count Sector Count A N 0 1 1 Sector Number Sector Number A N 0 1 1 * LBA bits 0-7 * LBA bits 0-7 A N 1 0 0 Cylinder Low Cylinder Low A N 1 0 0 * LBA bits 8-15 * LBA bits 8-15 A N 1 0 1 Cylinder High Cylinder High A N 1 0 1 * LBA bits 16-23 * LBA bits 16-23 A N 1 1 0 Device/Head. Device/Head A N 1 1 0 * LBA bits 24-27 * LBA bits 24-27 A N 1 1 1 Status Command A A x x x Invalid address Invalid address Logic converntions: A = Signal asserted N = Signal not asserted x = Does not matter which it is * = Mapping of registers in LBA mode Figure 48. Register Set Communication to or from the device is through an I/O Register that routes the input or output data to or from the registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and DIOW-). The Command Block Registers are used for sending commands to the device or posting status from the device. The Control Block Registers are used for device control and to post alternate status. Travelstar 32GH/30GT/20GN hard disk drive specifications 65

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10.0 Registers
Invalid address
Invalid address
x
x
x
A
A
Command
Status
1
1
1
N
A
* LBA bits 24-27
* LBA bits 24-27
0
1
1
N
A
Device/Head
Device/Head.
0
1
1
N
A
* LBA bits 16-23
* LBA bits 16-23
1
0
1
N
A
Cylinder High
Cylinder High
1
0
1
N
A
* LBA bits 8-15
* LBA bits 8-15
0
0
1
N
A
Cylinder Low
Cylinder Low
0
0
1
N
A
* LBA bits 0-7
* LBA bits 0-7
1
1
0
N
A
Sector Number
Sector Number
1
1
0
N
A
Sector Count
Sector Count
0
1
0
N
A
Features
Error Register
1
0
0
N
A
Data
Data
0
0
0
N
A
Command block registers
Not used
Device Address
1
1
1
A
N
Device Control
Alternate Status
0
1
1
A
N
Not used
Data bus high imped
x
0
1
A
N
Not used
Data bus high imped
x
x
0
A
N
Control block registers
Not used
Data bus high imped
x
x
x
N
N
WRITE (DIOW–))
READ (DIOR–)
DA0
DA1
DA2
CS1–
CS0–
Functions
Addresses
x
= Does not matter which it is
N = Signal not asserted
* = Mapping of registers in LBA mode
A = Signal asserted
Logic converntions:
Figure 48. Register Set
Communication to or from the device is through an I/O Register that routes the input or output data to or
from the registers addressed by the signals from the host (CS0-, CS1-, DA2, DA1, DA0, DIOR- and
DIOW-).
The Command Block Registers are used for sending commands to the device or posting status from the
device.
The Control Block Registers are used for device control and to post alternate status.
Travelstar 32GH/30GT/20GN hard disk drive specifications
65