HP BL25/35/45p HP ProLiant Network Adapter Software and Configuration Guide - Page 25

B5. MBUF SRAM via DMA test, B3. DMA SRAM test

Page 25 highlights

o Address test: Writes each address with unique increment data. Reads back data to ensure data is correct. After filling the entire data with the unique data, the program reads back data again to ensure data stays the same. o Walking one bit test: For each address, data one is written and read back for testing. Then the data is shifted left one bit, so the data becomes two and the same test is run again. It repeats for 32 times until the test bit is shifted out of test data. The same test is repeated for the entire test range. o Pseudo random data test: A pre-calculated pseudo random data is used to write a unique data into each test RAM. After the first pass of the test, the program reads back one more time to ensure data stays correct. • B2. BD SRAM test This tests the BD SRAM by performing the tests as described in test B1. The Scratch pad test. • B3. DMA SRAM test This tests DMA SRAM by performing the tests described in test B1. The Scratch pad test. • B4. MBUF SRAM test This tests DMA SRAM by performing the tests described in test B1. The Scratch pad test. • B5. MBUF SRAM via DMA test Eight test pattern data are used in the test. They are described below. A 0x1000 sized data buffer is used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It then, performs size 0x1000 transmit DMA from host buffer to adapter MBUF memory. It verifies the data integrity in MBUF against host memory and repeats the DMA for the entire MBUF buffer. Then it performs receive DMA from adapter to host. The 0x1000-byte test buffer is cleared to zero before each receive-DMA. It verifies the data integrity and the test is repeated for the entire MBUF SRAM range. Test Pattern Description: "16 00's 16 FF's" Fill the entire host DMA buffer with 16 bytes of 00's and then 16 bytes of FF's. "16 FF's 16 00's" Fill the entire host DMA buffer with 16 bytes of FF's and then 16 bytes of 00's. "32 00's 32 FF's" Fill the entire host DMA buffer with 32 bytes of 00's and then 32 bytes of FF's. "32 FF's 32 00's" Fill the entire host DMA buffer with 32 bytes of FF's and then 32 bytes of 00's. "00000000's" Fill the entire host DMA buffer with all zeros. "FFFFFFFF's" Fill the entire host DMA buffer with all FF's. "AA55AA55's" Fill the entire host DMA buffer with data 0xAA55AA55. "55AA55AA's" Fill the entire host DMA buffer with data 0x55AA55AA. Group C: Miscellaneous tests • C1. NVRAM test An increment test data is used in the EEPROM test. It fills the test data into the test range and reads it back to verify the content. After the test, it fills data with zeros to clear the memory. • C2. CPU test This test opens the file cpu.bin. If the file exists and the content is good, it loads code to the Rx and Tx CPU and verifies CPU execution. • C3. DMA test Configuration and diagnostics 25

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Configuration and diagnostics 25
o
Address test:
Writes each address with unique increment data. Reads back data to ensure data
is correct. After filling the entire data with the unique data, the program reads back data again
to ensure data stays the same.
o
Walking one bit test:
For each address, data one is written and read back for testing. Then the
data is shifted left one bit, so the data becomes two and the same test is run again. It repeats for
32 times until the test bit is shifted out of test data. The same test is repeated for the entire test
range.
o
Pseudo random data test:
A pre-calculated pseudo random data is used to write a unique data
into each test RAM. After the first pass of the test, the program reads back one more time to
ensure data stays correct.
B2. BD SRAM test
This tests the BD SRAM by performing the tests as described in test B1. The Scratch pad test.
B3. DMA SRAM test
This tests DMA SRAM by performing the tests described in test B1. The Scratch pad test.
B4. MBUF SRAM test
This tests DMA SRAM by performing the tests described in test B1. The Scratch pad test.
B5. MBUF SRAM via DMA test
Eight test pattern data are used in the test. They are described below. A 0x1000 sized data buffer is
used for this test. Before each pattern test, the buffer is initialized and filled with the test pattern. It
then, performs size 0x1000 transmit DMA from host buffer to adapter MBUF memory. It verifies the
data integrity in MBUF against host memory and repeats the DMA for the entire MBUF buffer. Then it
performs receive DMA from adapter to host. The 0x1000-byte test buffer is cleared to zero before
each receive-DMA. It verifies the data integrity and the test is repeated for the entire MBUF SRAM
range.
Test Pattern Description:
"16 00's 16 FF's" Fill the entire host DMA buffer with 16 bytes of 00's and then 16 bytes of FF's.
"16 FF's 16 00's" Fill the entire host DMA buffer with 16 bytes of FF's and then 16 bytes of 00's.
"32 00's 32 FF's" Fill the entire host DMA buffer with 32 bytes of 00's and then 32 bytes of FF's.
"32 FF's 32 00's" Fill the entire host DMA buffer with 32 bytes of FF's and then 32 bytes of 00's.
"00000000's" Fill the entire host DMA buffer with all zeros.
"FFFFFFFF's" Fill the entire host DMA buffer with all FF's.
"AA55AA55's" Fill the entire host DMA buffer with data 0xAA55AA55.
"55AA55AA's" Fill the entire host DMA buffer with data 0x55AA55AA.
Group C: Miscellaneous tests
C1. NVRAM test
An increment test data is used in the EEPROM test. It fills the test data into the test range and reads it
back to verify the content. After the test, it fills data with zeros to clear the memory.
C2. CPU test
This test opens the file cpu.bin. If the file exists and the content is good, it loads code to the Rx and
Tx CPU and verifies CPU execution.
C3. DMA test