Intel SPSH4 Product Guide - Page 153

C Error Messages and Error Codes Table 18 lists the port-80 codes displayed during the boot process. A beep code is a series of individual beeps on the PC speaker, each of equal length. Table 18 describes the error conditions associated with each beep code and the corresponding POST check point code as seen by a port 80h card. For example, if an error occurs at checkpoint 22h, the BIOS issues the beep code 1-3-1-1. Table 18. Standard BIOS POST Codes CP Beeps Reason 02 Verify Real Mode 04 Get Processor type 06 Initialize system hardware 08 Initialize chipset registers with initial POST values 09 Set in POST flag 0A Initialize Processor registers 0B Enable Processor cache 0C Initialize caches to initial POST values 0E Initialize I/O 0F Initialize the local bus IDE 10 Initialize Power Management 11 Load alternate registers with initial POST values 12 Restore Processor control word during warm boot 14 Initialize keyboard controller 16 1-2-2-3 BIOS ROM checksum 18 8254 timer initialization 1A 8237 DMA controller initialization 1C Reset Programmable Interrupt Controller 20 1-3-1-1 Test DRAM refresh 22 1-3-1-3 Test 8742 Keyboard Controller 24 Set ES segment register to 4GB 28 1-3-3-1 Autosize DRAM, system BIOS stops execution here if the BIOS does not detect any usable memory DIMMs 2A Clear 8 MB base RAM 2C 1-3-4-1 Base RAM failure, BIOS stops execution here if entire memory is bad 32 Test Processor bus-clock frequency 34 Test CMOS 35 RAM Initialize alternate chipset registers 36 Warm start shut down 37 Reinitialize the chipset continued 153