Intel E5310 Data Sheet - Page 28

Electrical Specifications

28

Quad-Core Intel® Xeon® Processor 5300 Series Datasheet

Notes:

1.

Unless otherwise noted, all specifications in this table are based on final silicon characterization data.

2.

These voltages are targets only. A variable voltage source should exist on systems in the event that a

different voltage is required. See

Section 2.5

for more information.

3.

The voltage specification requirements are measured across the VCC_DIE_SENSE and VSS_DIE_SENSE

lands and across the VCC_DIE_SENSE2 and VSS_DIE_SENSE2 lands with an oscilloscope set to 100 MHz

bandwidth, 1.5 pF maximum probe capacitance, and 1 M

Ω

minimum impedance. The maximum length of

ground wire on the probe should be less than 5 mm. Ensure external noise from the system is not coupled

in the scope probe.

4.

The processor must not be subjected to any static V

CC

level that exceeds the V

CC_MAX

associated with any

particular current. Failure to adhere to this specification can shorten processor lifetime.

5.

I

CC_MAX

specification is based on maximum V

CC

loadline Refer to

Figure 2-6

for details. The processor is

capable of drawing I

CC_MAX

for up to 10 ms. Refer to

Figure 2-2

and

Figure 2-3

for further details on the

average processor current draw over various time durations.

I

CC

I

CC

for Quad-Core Intel®

Xeon® Processor E5300

Series core with multiple VID

Launch - FMB

90

A

4,5,6,9

I

CC_RESET

I

CC_RESET

for Quad-Core

Intel® Xeon® Processor

E5300 Series core with

multiple VID

Launch - FMB

90

A

17

I

CC

I

CC


Xeon® Processor X5300

Series core with multiple VID

Launch - FMB

125

A

4,5,6,9

I

CC_RESET

I

CC_RESET

for Quad-Core

Intel® Xeon® Processor

X5300 Series core with

multiple VID

Launch - FMB

125

A

17

I

TT

I

CC

for V

TT

supply before V

CC

stable

I

CC

for V

TT

supply after V

CC

stable

8.0

7.0

A

A

15

I

CC_TDC

Thermal Design Current

(TDC) Quad-Core Intel®


Series

Launch - FMB

70

A

6,14

I

CC_TDC

Thermal Design Current

(TDC) Quad-Core Intel®


Series

Launch - FMB

110

A

6,14

I

CC_VTT_OUT

DC current that may be

drawn from V

TT_OUT

per land

580

mA

16

I

CC_GTLREF

I

CC

for

GTLREF_DATA_MID,

GTLREF_DATA_END,

GTLREF_ADD_MID,

GTLREF_ADD_END

200

μA

7

I

CC_VCCPLL

I

CC

for PLL supply

260

mA

12

I

TCC

I

CC



Series during active thermal

control circuit (TCC)

90

A

I

TCC

I

CC



Series during active thermal

control circuit (TCC)

125

A

Table 2-12.

Voltage and Current Specifications

(Sheet 2 of 2)

Symbol

Parameter

Min

Typ

Max

Unit

Notes

1,11

Section	Page
1 Introduction	9
1.1 Terminology	11
1.2 State of Data	13
1.3 References	13
2 Electrical Specifications	15
2.1 Front Side Bus and GTLREF	15
2.2 Power and Ground Lands	16
2.3 Decoupling Guidelines	16
2.3.1 VCC Decoupling	16
2.3.2 VTT Decoupling	16
2.3.3 Front Side Bus AGTL+ Decoupling	17
2.4 Front Side Bus Clock (BCLK[1:0]) and Processor Clocking	17
2.4.1 Front Side Bus Frequency Select Signals (BSEL[2:0])	18
2.4.2 PLL Power Supply	19
2.5 Voltage Identification (VID)	19
2.6 Reserved, Unused, or Test Signals	21
2.7 Front Side Bus Signal Groups	22
2.8 CMOS Asynchronous and Open Drain Asynchronous Signals	24
2.9 Test Access Port (TAP) Connection	24
2.10 Platform Environmental Control Interface (PECI) DC Specifications	24
2.10.1 DC Characteristics	24
2.10.2 Input Device Hysteresis	25
2.11 Mixing Processors	26
2.12 Absolute Maximum and Minimum Ratings	26
2.13 Processor DC Specifications	27
2.13.1 Flexible Motherboard Guidelines (FMB)	27
2.13.2 VCC Overshoot Specification	33
2.13.3 Die Voltage Validation	34
2.14 AGTL+ FSB Specifications	34
3 Mechanical Specifications	39
3.1 Package Mechanical Drawings	39
3.2 Processor Component Keepout Zones	43
3.3 Package Loading Specifications	43
3.4 Package Handling Guidelines	44
3.5 Package Insertion Specifications	44
3.6 Processor Mass Specifications	44
3.7 Processor Materials	44
3.8 Processor Markings	45
3.9 Processor Land Coordinates	45
4 Land Listing	49
4.1 Quad-Core Intel® Xeon® Processor 5300 Series Pin Assignments	49
4.1.1 Land Listing by Land Name	49
4.1.2 Land Listing by Land Number	60
5 Signal Definitions	71
5.1 Signal Definitions	71
6 Thermal Specifications	79
6.1 Package Thermal Specifications	79
6.1.1 Thermal Specifications	79
6.1.2 Thermal Metrology	83
6.2 Processor Thermal Features	84
6.2.1 Thermal Monitor Features	84
6.2.2 Thermal Monitor (TM1)	84
6.2.3 Thermal Monitor 2	85
6.2.4 On-Demand Mode	86
6.2.5 PROCHOT# Signal	87
6.2.6 FORCEPR# Signal	87
6.2.7 THERMTRIP# Signal	88
6.3 Platform Environment Control Interface (PECI)	88
6.3.1 Introduction	88
6.3.2 PECI Specifications	89
7 Features	91
7.1 Power-On Configuration Options	91
7.2 Clock Control and Low Power States	91
7.2.1 Normal State	92
7.2.2 HALT or Extended HALT State	92
7.2.3 Stop-Grant State	94
7.2.4 Extended HALT Snoop or HALT Snoop State, Stop Grant Snoop State	94
7.3 Enhanced Intel SpeedStep® Technology	95
8 Boxed Processor Specifications	97
8.1 Introduction	97
8.2 Mechanical Specifications	99
8.2.1 Boxed Processor Heat Sink Dimensions (CEK)	99
8.2.2 Boxed Processor Heat Sink Weight	107
8.2.3 Boxed Processor Retention Mechanism and Heat Sink Support (CEK)	107
8.3 Electrical Requirements	107
8.3.1 Fan Power Supply (Active CEK)	107
8.3.2 Boxed Processor Cooling Requirements	108
8.4 Boxed Processor Contents	109
9 Debug Tools Specifications	111
9.1 Debug Port System Requirements	111
9.2 Target System Implementation	111
9.2.1 System Implementation	111
9.3 Logic Analyzer Interface (LAI)	111
9.3.1 Mechanical Considerations	112

Intel E5310 Data Sheet - Page 28

Table 2-12., Voltage and Current Specifications, Sheet 2 of 2, Symbol, Parameter, Notes

Page 28 highlights