Intel E5310 Data Sheet - Page 93
Table 7-2., Extended HALT Maximum Power, Stop Clock State Machine
UPC - 735858190800
View all Intel E5310 manuals
Add to My Manuals
Save this manual to your list of manuals |
Page 93 highlights
Features Table 7-2. Extended HALT Maximum Power Symbol PEXTENDED_HALT Quad-Core Intel® Xeon® Processor E5300 Series PEXTENDED_HALT QuadCore Intel® Xeon® Processor X5300 Series Parameter Extended HALT State Power Extended HALT State Power Min Typ Max 30/34 Unit W Notes 1,2,3 50 W 1,2 Notes: 1. The specification is at TCASE = 50°C and nominal VCC. The VID setting represents the maximum expected VID while running in HALT state. 2. This specification is characterized by design. 3. Processors running in the lowest bus ratio will enter the HALT state when the processor has executed the HALT and MWAIT instruction since the processor is already in the lowest core frequency and voltage operating point. Values represent SKUs with Extended HALT state (30 W) and without Extended HALT state (34 W). The processor exits the Extended HALT state when a break event occurs. When the processor exits the Extended HALT state, it will first transition the VID to the original value and then change the bus to core frequency ratio back to the original value. Figure 7-1. Stop Clock State Machine Normal State Normal execution HALT or MWAIT Instruction and HALT Bus Cycle Generated INIT#, BINIT#, INTR, NMI, SMI#, RESET#, FSB interrupts Extended HALT or HALT State BCLK running Snoops and interrupts allowed STPCLK# Asserted STPCLK# De-asserted Stop Grant State BCLK running Snoops and interrupts allowed STAPsCsLeKrt#eSdTDPeC-LaKss#erted Snoop Event Occurs Snoop Event Serviced Snoop Snoop Event Event Occurs Serviced Extended HALT Snoop or HALT Snoop State BCLK running Service snoops to caches Stop Grant Snoop State BCLK running Service snoops to caches Quad-Core Intel® Xeon® Processor 5300 Series Datasheet 93