Intel BB5520UR Product Specification - Page 128

Connector/Header Locations and Pin-outs Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS Pin Name 9 PE_ICH10_SAS_SW_C_TP1 11 GND 13 PE_ICH10_SAS_SW_C_TN2 15 GND 17 PE_ICH10_SAS_SW_C_TN3 19 GND 21 PE_WAKE_N 23 P3V3 25 P3V3 27 GND 29 PE_ICH10_SAS_SW_RXN0 31 GND 33 PE_ICH10_SAS_SW_RXN1 35 GND 37 PE_ICH10_SAS_SW_RXN2 39 GND 41 PE_ICH10_SAS_SW_RXN3 43 GND 45 CLK_100M_SAS_DN 47 GND 49 P3V3 Pin Name 10 PE_ICH10_SAS_SW_C_TN1 12 GND 14 PE_ICH10_SAS_SW_C_TN2 16 GND 18 PE_ICH10_SAS_SW_C_TN3 20 FM_SAS_PRSNT_N 22 FM_SAS_RST_N 24 PE_RXN 26 P3V3_AUX 28 PE_ICH10_SAS_SW_RXP0 30 GND 32 PE_ICH10_SAS_SW_RXP1 34 GND 36 PE_ICH10_SAS_SW_RXP2 38 GND 40 PE_ICH10_SAS_SW_RXP3 42 GND 44 CLK_100M_SAS_DP 46 GND 48 P3V3 50 P3V3 6.5.5 Serial Port Connectors The server boards provide one external DB9 Serial A port (J8A1) and one internal 9-pin Serial B header (J1B1). The following tables define the pin-outs. Table 60. External DB9 Serial A Port Pin-out (J8A1) Pin Signal Name 1 SPA_DCD 2 SPA_SIN_L 3 SPA_SOUT_N 4 SPA_DTR 5 GND 6 SPA_DSR 7 SPA_RTS 8 SPA_CTS 9 SPA_RI Description DCD (carrier detect) RXD (receive data) TXD (Transmit data) DTR (Data terminal ready) Ground DSR (data set ready) RTS (request to send) CTS (clear to send) RI (Ring Indicate) Table 61. Internal 9-pin Serial B Header Pin-out (J1B1) Pin Signal Name Description 1 SPB_DCD DCD (carrier detect) 2 SPB_DSR DSR (data set ready) 3 SPB_SIN_L RXD (receive data) 4 SPB_RTS RTS (request to send) 5 SPB_SOUT_N TXD (Transmit data) 6 SPB_CTS CTS (clear to send) 7 SPB_DTR DTR (Data terminal ready) 8 SPB_RI RI (Ring indicate) 9 SPB_EN_N Enable 114 Revision 1.8 Intel order number E39529-013