Intel BB5520UR Product Specification - Page 149

Table 80. Turn On/Off Timing, Turn On/Off Timing Power Supply Signals

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Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS Design and Environmental Specifications Table 80. Turn On/Off Timing Item Tsb_on_delay Tac_on_delay Tvout_holdup Tpwok_holdup Tpson_on_delay Tpson_pwok Tpwok_on Tpwok_off Tpwok_low Tsb_vout T5VSB_holdup Description Delay from AC being applied to 5 VSB being within regulation. Delay from AC being applied to all output voltages being within regulation. Time all output voltages stay within regulation after loss of AC. Delay from loss of AC to de-assertion of PWOK Delay from PSON# active to output voltages within regulation limits. Delay from PSON# deactivate to PWOK being de-asserted. Delay from output voltages within regulation limits to PWOK asserted at turn on. Delay from PWOK de-asserted to output voltages (3.3 V, 5 V, 12 V, and -12 V) dropping out of regulation limits. Duration of PWOK being in the de-asserted state during an off/on cycle using AC or the PSON signal. Delay from 5 VSB being in regulation to O/Ps being in regulation at AC turn on. Time the 5 VSB output voltage stays within regulation after loss of AC. Minimum N/A N/A 21 20 5 100 1 100 50 70 Maximum 1500 2500 N/A N/A 400 50 500 N/A N/A 1000 N/A Units ms ms ms ms ms ms ms ms ms ms ms AC Input Vout TAC_on_delay Tsb_on_delay PWOK Tvout_holdup Tpwok_on Tpwok_holdup Tpwok_off Tpwok_low Tsb_on_delay Tpwok_on Tpwok_off Tpson_pwok 5VSB PSON Tsb_vout T5VSB_holdup Tpson_on_delay AC turn on/off cycle PSON turn on/off cycle Figure 61. Turn On/Off Timing (Power Supply Signals) Revision 1.8 135 Intel order number E39529-013

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Intel® Server Boards S5520HC, S5500HCV, and S5520HCT TPS
Design and Environmental Specifications
Revision 1.8
Intel order number E39529-013
135
Table 80. Turn On/Off Timing
Item
Description
Minimum
Maximum
Units
Tsb_on_delay
Delay from AC being applied to 5 VSB being within
regulation.
N/A
1500
ms
Tac_on_delay
Delay from AC being applied to all output voltages being
within regulation.
N/A
2500
ms
Tvout_holdup
Time all output voltages stay within regulation after loss of
AC.
21
N/A
ms
Tpwok_holdup
Delay from loss of AC to de-assertion of PWOK
20
N/A
ms
Tpson_on_delay
Delay from PSON# active to output voltages within
regulation limits.
5
400
ms
Tpson_pwok
Delay from PSON# deactivate to PWOK being de-asserted.
50
ms
Tpwok_on
Delay from output voltages within regulation limits to PWOK
asserted at turn on.
100
500
ms
Tpwok_off
Delay from PWOK de-asserted to output voltages (3.3 V, 5
V,
12 V, and -12 V) dropping out of regulation limits.
1
N/A
ms
Tpwok_low
Duration of PWOK being in the de-asserted state during an
off/on cycle using AC or the PSON signal.
100
N/A
ms
Tsb_vout
Delay from 5 VSB being in regulation to O/Ps being in
regulation at AC turn on.
50
1000
ms
T5VSB_holdup
Time the 5 VSB output voltage stays within regulation after
loss of AC.
70
N/A
ms
AC Input
Vout
PWOK
5VSB
PSON
T
sb_on_delay
T
AC_on_delay
T
pwok_on
T
vout_holdup
T
pwok_holdup
T
pson_on_delay
T
sb_on_delay
T
pwok_on
T
pwok_off
T
pwok_off
T
pson_pwok
T
pwok_low
T
sb_vout
AC turn on/off cycle
PSON turn on/off cycle
T
5VSB
_
holdup
Figure 61. Turn On/Off Timing (Power Supply Signals)