Intel BB5520UR Product Specification - Page 183

Intel® Server Boards S5520HC, S5500HCV and S5520HCT TPS Appendix F: POST Error Messages and Handling POST Error Beep Codes The following table lists the POST error beep codes. Prior to system video initialization, the BIOS uses these beep codes to inform users of error conditions. The beep code is followed by a user-visible code on the POST Progress LED's. Table 87. POST Error Beep Codes Beeps Error Message 3 Memory error POST Progress Code Multiple Description System halted because a fatal error related to the memory was detected. The BMC may generate beep codes upon detection of failure conditions. Beep codes are sounded each time the problem is discovered, such as on each power-up attempt but are not sounded continuously. Each digit in the code is represented by a sequence of beeps whose count is equal to the digit. Table 88. BMC Beep Codes Code Reason for Beep 1-5-2-1 CPU: Empty slot/Population error 1-5-4-2 1-5-4-4 Power fault: DC power unexpectedly lost (power good dropout). Power control fault (power good assertion timeout). Associated Sensors CPU sockets are populated incorrectly - CPU1 must be populated before CPU2. Power unit - power unit failure offset. Power unit - soft power control failure offset. Revision 1.8 169 Intel order number E39529-013