Intel BB5520UR Product Specification - Page 187

Intel® Server Boards S5520HC, S5500HCV and S5520HCT TPS Term GPA GPIO HPA HSC HT Hz I2C IA ICH ILM IMC INTR IOH IPMB IPMI IRQ ITE JBOD JRE KB KVM LAN LCD LDAP LED LPC LSB LUN MAC MB ME MMU MRC ms MSB MTBF Mux NIC Nm NMI NUMA NVSRAM OEM Ohm OLTT PAE Definition Guest Physical Address General Purpose I/O Host Physical Address Hot-Swap Controller Hyper-Threading Hertz (1 cycle/second) Inter-Integrated Circuit Bus Intel® Architecture I/O Controller Hub Independent Loading Mechanism Integrated Memory Controller Interrupt I/O HUB Intelligent Platform Management Bus Intelligent Platform Management Interface Interrupt request Information Technology Equipment Just Bunch of Disks Java Runtime Environment 1024 bytes Keyboard, Video, and Mouse Local Area Network Liquid Crystal Display Local Directory Authentication Protocol Light Emitting Diode Low-Pin Count Least Significant Bit Logical Unit Number Media Access Control 1024 KB Manageability Engine Memory Management Unit Memory Reference Code Milliseconds Most Significant Bit Mean Time Between Failures Multiplexer Network Interface Controller Nanometer Non-maskable Interrupt Non-Uniform Memory Access Non-volatile Static Random Access Memory Original Equipment Manufacturer Unit of electrical resistance Open-Loop Thermal Throttling Physical Address Extension Revision 1.8 Intel order number E39529-013 Glossary 173