HP Integrity Superdome SX1000 User Guide, Sixth Edition - HP Integrity Superdo - Page 25

Overview Cell Board - 12-MB FLASH EPROM for system firmware boot-strap code storage - 1-MB system firmware scratch pad SRAM for operation instruction and data storage - 512-KB battery backed Non-Volatile RAM (NVRAM) - Wall-clock information provided by a battery-backed real-time clock (RTC) chip - Marshal FPGA provides memory-mapped registers for configuration-related information - Serial Presence Detect (SPD) bus for detection and investigation of loaded DIMMs - Low-level debug and general purpose debug port (UART) Cell Power Board The Cell Power Board (OCPB) attaches to the cell board and provides redundant 12v, 3.3v, and 1.5v power for the (cell board. There is one OCPB per cell board. It contains 8 DC-DC converters, a linear regulator, input protection and filter components, in-rush current limiting circuitry, five LED indicators, and various status and control logic devices. The OCPB is not hot swappable by itself. Figure 1-7 Cell Power Board Chapter 1 13