HP Integrity Superdome SX1000 User Guide, Sixth Edition - HP Integrity Superdo - Page 26
PCI-X I/O, PCI-X Backplane
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Overview PCI-X I/O PCI-X I/O The new PCI-X I/O chassis holds PCI and PCI-X type I/O cards for the two new systems. Older Superdome systems used only the PCI cards and card cages. The chassis consists of the following three printed circuit assemblies: PCI-X I/O Backplane PCI-X I/O Power Board PCI-X I/O Transfer Board It also contains the necessary mechanical components required to support 12 PCI-X card slots. The I/O system architecture is shown in Figure 1-8. This figure depicts the path between the system I/O backplane and the PCX-X card slots. The CC on each cell board communicates with the System Bus Adaptor (SBA) on the PCI-X card cage over the SBA link. The SBA link consists of both an inbound and an outbound link with an effective bandwidth of approximately 1 GB/sec. in each direction. The SBA converts the SBA link protocol into enhanced "ropes." The SBA can support up to 16 of these high-speed bidirectional enhanced rope links for a total aggregate bandwidth of approximately 8 GB/sec. The Local Bus Adaptors (LBA) is connected to the I/O by either a single or dual enhanced ropes. PCI-X Backplane The heart of the PCI-X I/O card cage backplane is SBA ASIC plus 12 LBA ASICs (one per PCI-X slot). The SBA communicates directly with the CC of the host cell board by way of a high bandwidth SBA link. The SBA spawns 16 enhanced ropes that communicate with the LBA chips. Each LBA, then, produces a single 64-bit PCI-X bus, which supports a single PCI/PCI-X card. The 16 enhanced ropes generated by the SBA are routed to the 12 LBAs chips. All PCI-X card slots can support PCI-X 133. Each slot is keyed for 3.3-volt signaling and can accept any universal or 3.3-Volt only PCI or PCI-X add-in card. Associated with each PCI-X slot is a hot swap controller, which enables the online addition, replacement, and deletion of individual PCI-X cards without disturbing the operation of other cards in the system. The LBA provides the control/status signals and internal registers necessary for firmware to control and monitor the power status of a PCI-X slot. It also provides firmware control of the Attention indicator LED. The Slot State indicator LED is driven directly by the hot swap controller. 14 Chapter 1