IBM 8681 Hardware Maintenance Manual - Page 235

System Management Interrupt (SMI) Handler System Management Interrupt (SMI) Handler is the means of detecting system errors and logging error messages into the system error log. It is installed during the POST sequence at check point A9, and is functional thereafter. SMI Handler detects errors that are generated by system hardware such as CPU, memory and PCI devices. Any SMI-logged error message has "SMI Hdlr" in the SOURCE field as part of the system error message entry. Error messages are logged at different levels as system errors are detected. A single system failure could be the combination of errors, and it will cause multiple unique error messages to be logged in the error log. For example, a single PCI device failure will cause multiple PCI errors, and it will also cause multiple errors at the PCI Bridge level. Each of those errors will create an entry in the system error log. It is very important to retrieve all the SMI error messages (SOURCE = SMI Hdlr), the data in the ERROR CODE and ERROR DATA fields for each message, and the sequence in which the error messages were posted to the system error log. The following table describes SMI error messages, along with possible failing FRUs or appropriate action to be taken. SMI Error Message Memory UNC ECC Error on port A, DIMM yy Memory UNC ECC Error on port B, DIMM yy Memory SBC ECC Error on port A, DIMM yy Memory SBC ECC Error on port B, DIMM yy UNC on P6 Processor Bus A UNC on P6 Processor Bus B Error on processor An FRU/Action DIMM yy, port A DIMM yy, port B DIMM yy, port A DIMM yy, port B Suspect FRUs in the following order: 1. Processors on bus A 2. Processor daughter board A 3. Processor controller board Suspect FRUs in the following order: 1. Processors on bus B 2. Processor daughter board B 3. Processor controller board Suspect FRUs in the following order: 1. Run diagnostics on the processors 2. Processor An 3. Processor daughter board A 4. Processor controller board Netfinity 8500R - Type 8681 227