4
Datasheet
7
Features
..................................................................................................................
83
7.1
Power-On Configuration (POC)
.............................................................................
83
7.2
Clock Control and Low Power States
.....................................................................
83
7.2.1
Thread and Core Power State Descriptions
.................................................
84
7.2.2
Package Power State Descriptions
.............................................................
85
7.3
Sleep States
.....................................................................................................
86
7.4
ACPI P-States (Intel
®
Turbo Boost Technology)
.....................................................
86
7.5
Enhanced Intel
®
SpeedStep
®
Technology
.............................................................
87
8
Boxed Processor Specifications
................................................................................
89
8.1
Introduction
......................................................................................................
89
8.2
Mechanical Specifications
....................................................................................
90
8.2.1
Boxed Processor Cooling Solution Dimensions
.............................................
90
8.2.2
Boxed Processor Fan Heatsink Weight
.......................................................
92
8.2.3
Boxed Processor Retention Mechanism and Heatsink Attach Clip Assembly
.....
92
8.3
Electrical Requirements
......................................................................................
92
8.3.1
Fan Heatsink Power Supply
......................................................................
92
8.4
Thermal Specifications
........................................................................................
93
8.4.1
Boxed Processor Cooling Requirements
......................................................
93
8.4.2
Variable Speed Fan
.................................................................................
95
Figures
1-1
High-Level View of Processor Interfaces
.................................................................
9
2-1
Active ODT for a Differential Link Example
............................................................
13
2-2
Input Device Hysteresis
......................................................................................
21
2-3
VCC Static and Transient Tolerance Load Lines
......................................................
25
2-4
VTT Static and Transient Tolerance Load Line
........................................................
27
2-5
VCC Overshoot Example Waveform
......................................................................
30
3-1
Processor Package Assembly Sketch
.....................................................................
31
3-2
Processor Package Drawing (Sheet 1 of 2)
............................................................
32
3-3
Processor Package Drawing (Sheet 2 of 2)
............................................................
33
3-4
Processor Top-side Markings
...............................................................................
35
3-5
Processor Land Coordinates and Quadrants (Bottom View)
......................................
36
6-1
Processor Thermal Profile
....................................................................................
73
6-2
Thermal Test Vehicle (TTV) Case Temperature (TCASE) Measurement Location
..........
75
6-3
Frequency and Voltage Ordering
..........................................................................
77
7-1
Power States
.....................................................................................................
84
8-1
Mechanical Representation of the Boxed Processor
.................................................
89
8-2
Space Requirements for the Boxed Processor (side view)
........................................
90
8-3
Space Requirements for the Boxed Processor (top view)
.........................................
91
8-4
Space Requirements for the Boxed Processor (overall view)
....................................
91
8-5
Boxed Processor Fan Heatsink Power Cable Connector Description
............................
92
8-6
Baseboard Power Header Placement Relative to Processor Socket
.............................
93
8-7
Boxed Processor Fan Heatsink Airspace Keepout Requirements (top view)
.................
94
8-8
Boxed Processor Fan Heatsink Airspace Keepout Requirements (side view)
................
94
8-9
Boxed Processor Fan Heatsink Set Points
..............................................................
95