AMD AMD-K6-2/400 User Guide - Page 332
Output Valid Delay Timing, Maximum Float Delay Timing, Input
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Tx CLK 1.5 V Output Signal Tx Max tv Min Valid n Valid n +1 Note: For symbols tv listed in Table 64 on page 298 and Table 66 on page 302, where: v = 6, 8, 10, 12, 14, 15, 17, 18, 20, 22, 24, 26, 27, 28, 29, 30, 32, 34, 36, 37, 39, 41, 42 Figure 106. Output Valid Delay Timing CLK 1.5 V Tx Tx Tx Tx tf Output Signal Valid tv Min Note: For symbols tv and tf listed in Table 64 on page 298 and Table 66 on page 302, where: v = 6, 8, 10, 12, 15, 18, 20, 22, 24, 30, 32, 34, 37, 39, 42 f = 7, 9, 11, 13, 16, 19, 21, 23, 25, 31, 33, 35, 38, 40, 43 Figure 107. Maximum Float Delay Timing CLK Input Signal Tx Tx Tx Tx 1.5 V ts th Note: For symbols ts and th listed in Table 65 on page 300 and Table 67 on page 304, where: s = 44, 46, 48, 50, 52, 54, 56, 58, 60, 62, 64, 66, 68, 70, 72, 74, 76, 78, 80, 82, 84, 86, 88 h = 45, 47, 49, 51, 53, 55, 57, 59, 61, 63, 65, 67, 69, 71, 73, 75, 77, 79, 81, 83, 85, 87, 89 Figure 108. Input Setup and Hold Timing 310 Signal Switching Characteristics Chapter 16