AMD AMD-K6-2/400 User Guide - Page 46
Register X and Y, Pipelines, 3DNow! ALU, the MMX/3DNow! multiplier and MMX shifter
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Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet 23542A/0-September 2000 Register X and Y Pipelines The functional units that execute MMX and 3DNow! instructions share pipeline control with the Integer X and Integer Y units. The register X and Y functional units are attached to the issue bus for the register X execution pipeline or the issue bus for the register Y execution pipeline or both. Each register pipeline has dedicated resources that consist of an integer execution unit and an MMX ALU execution unit, therefore allowing superscalar operation on integer and MMX instructions. In addition, both the X and Y issue buses are connected to the 3DNow! ALU, the MMX/3DNow! multiplier and MMX shifter, which allows the appropriate RISC86 operation to be issued through either bus. Figure 6 shows the details of the X and Y register pipelines. Scheduler Buffer (24 RISC86® Operations) Issue Bus for the Register X Execution Pipeline Issue Bus for the Register Y Execution Pipeline Integer X ALU MMXÉ ALU MMX/ 3DNow!É Multiplier MMX Shifter 3DNow! ALU MMX ALU Integer Y ALU Figure 6. Register X and Y Pipeline Functional Units 24 Internal Architecture Chapter 2