AMD AMD-K6-2/400 User Guide - Page 83
System Segment Descriptor, Table 10., System Segment and Gate Types, Description
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23542A/0-September 2000 Preliminary Information AMD-K6™-2E+ Embedded Processor Data Sheet Reserved Symbol G X AVL P DPL DT Type Description Granularity Not Needed Availability to Software Present/Valid Bit Descriptor Privilege Level Descriptor Type See Table 10 Bits 23 22 20 15 14-13 12 11-8 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 Base Address 31-24 A GX V Segment P DPL 0 Type L Limit Base Address 23-16 Base Address 15-0 Segment Limit 15-0 Figure 52. System Segment Descriptor Table 10. System Segment and Gate Types Type Description 0 Reserved 1 Available 16-bit TSS 2 LDT 3 Busy 16-bit TSS 4 16-bit Call Gate 5 Task Gate 6 16-bit Interrupt Gate 7 16-bit Trap Gate 8 Reserved 9 Available 32-bit TSS A Reserved B Busy 32-bit TSS C 32-bit Call Gate D Reserved E 32-bit Interrupt Gate F 32-bit Trap Gate Chapter 3 Software Environment 61