HP Integrity rx2620 Installation Guide, Third Edition - HP Integrity rx2620 (A - Page 20
System Board Components, System Block Diagram
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Introduction System Board Components System Board Components This section provides a block diagram of the system board and descriptions of key components (integrated circuits) on the board. Figure 1-4 shows a block diagram of the rx2620 server. Figure 1-4 System Block Diagram Itanium-2 IPF Itanium-2 IPF 267MHz 8.5GB/S Peak Data BandWidth 200MHz 6.4GB/S Peak Data BandWidth PCI-X Interface PCI-X 133 "Slot1" ASIC Bus Interface ROPE 4 ROPE 5 ASIC Bus Interface Industry Standard DDR1 DIMM DIMM DIMM DIMM DIMM DIMM MEMORY DIMM DIMM DIMM DIMM DIMM DIMM 133 MHz bus clock 267 MT/s data rate 8.5GB/s peak data bandwidth DMD ASIC Bus Interface PDH Bus FMW/PDC Flash 816MMBB FMW SRAM (on battery, scratch RAM + NVM) 512KB RTC DUART COM1 COM2 System/BMC Console & Serial Port Serial Port OS Enabled PCI-X 133 "Slot2" ASIC Bus Interface PCI-X 133 "Slot3" ASIC Bus Interface PCI-X 133 "Slot4" ASIC Bus Interface ROPE 3 ROPE 2 ROPE 6 ROPE 7 VGA Optional VGA Battery• SRAM DRAM Flash etc... PCI 33/32 ASIC Bus Interface RiLMOC/GMSPP UPS Console Modem LAN100BT Management Processor 267MHz 8b data 533MB/s Peak Data Bandwidth per rope FPGA BMC LPC Manageability LPC + ACPI Bus Controller BMC SRAM 512KB BMC (on battery, scratch RAM• bus +NVM+ FPL • forward progress log) BMC FLASH 1MB I2C etc... LED STATUS PANEL LOCATOR DIAG LEDs ON-OFF LAN Activity ROPE 0 ASIC Bus Interface ROPE 1 PCI 33/32 I2C, etc... ASIC Bus Interface PCI-X 133 FLASH LLAANN 1100//11000// 110G00 SCSI ID 2 HDD #3 IDE USB 2.0 To AGP Riser DVD RW Slim Line Keyboard Mouse SCSI ID 1 SCSI ID 0 HDD #2 HDD #1 SCSI BACKPLANE (SE-LVDS SCA-2 80pin) Channel B Channel A SCSI U320 FLASH externEaxlte(rsne-alvlds 68p) (SE-LVDS 68p) The following describes the main components of the system board: • "Processor Sockets" on page 21 • "Processor Bus" on page 21 • "ZX1 I/O and Memory Controller" on page 21 • "System Memory" on page 21 • "I/O Bus Interface" on page 23 • "Processor Dependent Hardware Controller" on page 23 20 Chapter 1
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