HP Integrity rx2620 Installation Guide, Third Edition - HP Integrity rx2620 (A - Page 23
I/O Bus Interface, Processor Dependent Hardware Controller, Table 1-2, Memory Array Capacities
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Introduction System Board Components DIMMs are loaded in groups of four, known as a quad. All four DIMMs in a quad must be the same size. Table 1-2 summarizes the memory solutions. Table 1-2 Memory Array Capacities Min / Max Memory Size 1 GB / 3 GB 2 GB / 6 GB 4 GB / 12 GB 8 GB / 24 GB 16 GB / 32 GB Single DIMM Size 256 MB DIMM 512 MB DIMM 1024 MB DIMM 2048 MB DIMM 4096 MB DIMM DDR SDRAM Count, Type and Technology 18 x 32 MB x 4 DDR1 SDRAMs (128 MB) 36 x 32 MB x 4 DDR1 SDRAMs (128 MB) 36 x 64 MB x 4 DDR1 SDRAMs (256 MB) 36 x 128 MB x 4 DDR1 SDRAMs (512 MB) 36 x 256 MB x 4 DDR1 SDRAMs (1024 MB) I/O Bus Interface The I/O bus interface provides these features: • Industry standard PCI 33 MHz and 66 MHz, PCI-X 66 MHz to 133 MHz, 32 or 64 data bit support • Uses 3.3 V PCI only, and it does not support 5 V PCI • Optimizes for DMA performance • Supports 3.3 V or Universal keyed PCI cards. 5 V keyed PCI cards are not supported • Supports up to four PCI sockets Processor Dependent Hardware Controller The processor dependent hardware (PDH) controller provides these features: • 16-bit PDH bus with reserved address space for: - Flash memory - Non-volatile memory - Scratch RAM - Real Time Clock - Universal asynchronous receivers and transmitters (UARTs) - External registers - Firmware read/writable registers - Two general purpose 32-bit registers - Semaphore registers - Monarch selection registers - Test and Reset register • Reset and INIT generation Chapter 1 23