Nintendo 1504166 Programming Manual - Page 107

TM*CNT_H [d01 - 00] Prescalar Selection, TM*CNT_H [d02] Count-Up Timing

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AGB Programming Manual Timer TM*CNT_H [d02] Count-Up Timing With a setting of 0, count-up is performed in accordance with the prescalar specification in [d01-00]. With a setting of 1, overflow of the timer channel one number lower starts a count-up regardless of the prescalar specification. This mode is suitable for purposes such as time measurement over relatively long periods. The count-up timing specification is disabled for Timer 0, which counts up in accordance with the prescalar specification. TM*CNT_H [d01 - 00] Prescalar Selection Allows selection of a prescalar based on the system clock (16.78MHz). Setting 00 01 10 11 Prescalar (Count-Up Interval) System clock (59.595 ns) 64 cycles of system clock ( 3.814 µs) 256 cycles of system clock (15.256 µs) 1024 cycles of system clock (61.025 µs) ©1999 - 2001 Nintendo of America Inc. 107 D.C.N. AGB-06-0001-002B4

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AGB Programming Manual
Timer
©1999 - 2001 Nintendo of America Inc.
107
D.C.N. AGB-06-0001-002B4
TM*CNT_H [d02] Count-Up Timing
With a setting of 0, count-up is performed in accordance with the prescalar
specification in [d01-00].
With a setting of 1, overflow of the timer channel
one number lower starts a count-up regardless of the prescalar
specification.
This mode is suitable for purposes such as time measurement over
relatively long periods.
The count-up timing specification is disabled for Timer 0, which counts up
in accordance with the prescalar specification.
TM*CNT_H [d01 - 00] Prescalar Selection
Allows selection of a prescalar based on the system clock (16.78MHz).
Setting
Prescalar (Count-Up Interval)
00
System clock
(59.595 ns)
01
64 cycles of system clock
( 3.814
μ
s)
10
256 cycles of system clock
(15.256
μ
s)
11
1024 cycles of system clock
(61.025
μ
s)