Nintendo 1504166 Programming Manual - Page 122

DMA Problems: How to avoid them

Page 122 highlights

AGB Programming Manual DMA Transfer 12.4 DMA Problems: How to avoid them. With DMA transfer it is possible to synchronize with H-blank, V-blank, Direct sound (DMA1,2), and Display (DMA3) (DMA repeat). However, there are some problems with this function as discussed below. With a DMA repeat, the DMA begins when the start trigger is sent. When the word count's data transfer is finished, DMA stops is repeated. If the DMA enable flag is cleared by the CPU at the same time as the DMA start trigger, the DMA locks up. Therefore, be careful when stopping the DMA during a DMA repeat. 1) When the DMA repeat function is not used. The DMA automatically stops after it has been executed one time, so do not clear the DMA enabled flag with the user program until it becomes 0. 2) When the DMA repeat function is used. Maintain a spacing of 4 clocks or more between the DMA start trigger and the timing to clear the DMA enabled flag by the CPU. For example, it is possible to stop the DMA safely by clearing an enabled flag before the next start trigger is sent by using an interrupt that occurs at the end of the DMA. When this method cannot be used, stop the DMA as shown below. 2-1) How to stop DMA repeat in H-blank and V-blank mode. DMA is not in progress and the DMA start trigger is not sent during the V-blank. Therefore, you can clear a DMA enable flag safely. If this method cannot be used, follow the procedures shown below. 1.Write the following settings in 16-bit width to the DMA control register. -DMA enabled flag : 1 (Enabled) -DMA start timing : 00 (Start Immediately) -Data request transfer flag of the Game Pak side: 0 (Disabled) (DMA3 only) -DMA repeat : 0 (OFF) -Other control bits : No change 2.Run a process for 4 clocks or more. Example: (Three NOP commands or one LDR command) + the 1st clock of the STR command using the following procedure (Section 3) makes 4 clocks total. (Data is actually written at the 2nd clock of the STR command.) ©1999 - 2001 Nintendo of America Inc. 122 D.C.N. AGB-06-0001-002B4

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AGB Programming Manual
DMA Transfer
©1999 - 2001 Nintendo of America Inc.
122
D.C.N. AGB-06-0001-002B4
12.4
DMA Problems: How to avoid them.
With DMA transfer it is possible to synchronize with H-blank, V-blank, Direct sound
(DMA1,2), and Display (DMA3) (DMA repeat).
However, there are some problems with this
function as discussed below.
With a DMA repeat, the DMA begins when the start trigger is sent.
When the word count's
data transfer is finished, DMA stops is repeated.
If the DMA enable flag is cleared by the CPU at the same time as the DMA start trigger, the
DMA locks up.
Therefore, be careful when stopping the DMA during a DMA repeat.
1) When the DMA repeat function is not used.
The DMA automatically stops after it has been executed one time, so do not clear the
DMA enabled flag with the user program until it becomes 0.
2) When the DMA repeat function is used.
Maintain a spacing of 4 clocks or more between the DMA start trigger and the timing to
clear the DMA enabled flag by the CPU. For example, it is possible to stop the DMA
safely by clearing an enabled flag before the next start trigger is sent by using an
interrupt that occurs at the end of the DMA.
When this method cannot be used, stop
the DMA as shown below.
2-1) How to stop DMA repeat in H-blank and V-blank mode.
DMA is not in progress and the DMA start trigger is not sent during the V-blank.
Therefore, you can clear a DMA enable flag safely.
If this method cannot be used,
follow the procedures shown below.
1.Write the following settings in 16-bit width to the DMA control register.
-DMA enabled flag :
1 (Enabled)
-DMA start timing :
00 (Start Immediately)
-Data request transfer flag of the Game Pak side:
0 (Disabled) (DMA3 only)
-DMA repeat :
0 (OFF)
-Other control bits :
No change
2.Run a process for 4 clocks or more.
Example:
(Three NOP commands or one LDR command) + the 1st clock of the STR
command using the following procedure (Section 3) makes 4 clocks total.
(Data is actually written at the 2nd clock of the STR command.)