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Pixel Data Address Mapping for the LCD Screen, 6.2.4.1 BG Mode 3 (32, 768 colors, 240x160 dots

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AGB Programming Manual Rendering Functions 6.2.4 Pixel Data Address Mapping for the LCD Screen The different address mappings for the different BG modes are shown below. The frame buffer (VRAM) starts at address 06000000h. Thus, to see the addresses used by the CPU, add 06000000h to the addresses shown below. 6.2.4.1 BG Mode 3 (32,768 colors, 240X160 dots, 1 frame buffer) Because there is a single frame buffer, this mode is used mainly for still images. However, it enables 32,768 colors to be displayed simultaneously over the full screen. 0 1 2 3 4 0 0h 2h 4h 6h 8h 1 1E0h 1E2h 1E4h 1E6h 1E8h 2 3C0h 3C2h 3C4h 3C6h 3C8h 3 5A0h 5A2h 5A4h 5A6h 5A8h 4 780h 782h 784h 786h 788h 236 1D8h 3B8h 598h 778h 958h 237 1Dah 3Bah 59Ah 77Ah 95Ah 238 1DCh 3BCh 59Ch 77Ch 95Ch 239 1DEh 3BEh 59Eh 77Eh 95Eh 156 12480h 12482h 12484h 12486h 12488h 157 12660h 12662h 12664h 12666h 12668h 158 12840h 12842h 12844h 12846h 12848h 159 12A20h 12A22h 12A24h 12A26h 12A28h 12658h 1265Ah 1265Ch 1265Eh 12838h 1283Ah 1283Ch 1283Eh 12A18h 12A1Ah 12A1Ch 12A1Eh 12BF8h 12BFAh 12BFCh 12BFEh VRAM address (+06000000h) ©1999 - 2001 Nintendo of America Inc. 55 D.C.N. AGB-06-0001-002B4

Section	Page
Introduction	3
Revision History	4
Table of Contents	9
Using This Manual	12
1 AGB System	13
1.1 System Overview	13
2 System Configuration	15
2.1 CPU Block Diagram	15
2.2 Complete Block Diagram	16
2.3 Memory Configuration and Access Width	17
2.4 Little-Endian	17
3 AGB Memory	18
3.1 Overall Memory Map	18
3.2 Memory Configuration	19
3.2.1 AGB Internal Memory	19
3.2.2 Game Pak Memory	20
3.3 Game Pak Memory Wait Control	21
3.3.1 Access Timing	23
3.3.2 Game Pak Bus	24
4 LCD	25
4.1 LCD Status	26
4.1.1 V Counter	26
4.1.2 General LCD Status	27
5 Image System	29
5.1 BG Modes	31
5.1.1 Details of BG Modes	31
5.1.2 VRAM Memory Map	32
6 Rendering Functions	33
6.1 Character Mode BG (BG Modes 0-2)	33
6.1.1 BG Control	33
6.1.2 Mosaic Size	39
6.1.3 VRAM Address Mapping of BG Data	40
6.1.4 Character Data Format	42
6.1.5 BG Screen Data Format	43
6.1.6 BG Screen Data Address Mapping for the LCD Screen	45
6.1.7 BG Rotation and Scaling Features	49
6.1.8 BG Scrolling	52
6.2 Bitmap Mode BGs (BG Modes 3-5)	53
6.2.1 BG Control	53
6.2.2 BG Rotation/Scaling	54
6.2.3 Pixel Data	54
6.2.4 Pixel Data Address Mapping for the LCD Screen	55
6.2.4.1 BG Mode 3 (32,768 colors,240x160 dots,1 frame buffer)	55
6.2.4.2 BG Mode 4 (256 colors,240x160 dots,2 frame buffers)	56
6.2.4.3 BG Mode 5 (32,768 colors,160x128 dots,2 frame buffers)	57
6.3 OBJ (Object)	58
6.3.1 OBJ Function Overview	58
6.3.2 Character Data Mapping	60
6.3.3 OAM	62
6.3.4 OBJ Rotation/Scaling Feature	70
6.4 Display Priority of OBJ and BG	72
7 Color Palettes	73
7.1 Color Palette Overview	73
7.2 Color Palette RAM	74
7.3 Color Data Format	76
8 Window Feature	77
8.1 Window Position Setting	77
8.2 Window Control	78
9 Color Special Effects	80
9.1 Selection of Color Special Effects	80
9.2 Color Special Effects Processing	82
10 Sound	84
10.1 Sound Block Diagram	84
10.2 Direct Sounds A and B	85
10.3 Sound 1	87
10.4 Sound 2	91
10.5 Sound 3	93
10.6 Sound 4	97
10.7 Sound Control	100
10.8 Sound PWM Control	104
11 Timer	106
12 DMA Transfer	108
12.1 DMA 0	109
12.2 DMA 1 and 2	113
12.3 DMA 3	117
12.4 DMA Problems: How to avoid them	122
13 Communication Functions	125
13.1 8-Bit/32-Bit Normal Serial Communication	128
13.2 16-Bit Multi-player Communication	134
13.3 UART Communication Functions	142
13.4 General Purpose Communication	148
13.5 JOY Bus Communication	150
13.6 AGB Game Link Cable	154
14 Key Input	155
14.1 Key Status	155
14.2 Key Interrupt Control	155
14.2.1 Interrupt Conditions	156
15 Interrupt Control	157
15.1 System-Allocated Area in Work RAM	159
15.2 Interrupt Operation	160
15.2.1 Normal Interrupt	160
15.2.2 Multiple Interrupts	161
16 Power-Down Functions	163
16.1 Stop Function	163
16.2 Halt Function	164
17 AGB System Calls	165
17.1 System Call Operation	165
17.1.1 Normal Calls	165
17.1.2 Multiple Calls	167

Match case Limit results 1 per page

AGB Programming Manual

Rendering Functions

D.C.N. AGB-06-0001-002B4

6.2.4 Pixel Data Address Mapping for the LCD Screen

The different address mappings for the different BG modes are shown

below.

The frame buffer (VRAM) starts at address 06000000h.

Thus, to see the

addresses used by the CPU, add 06000000h to the addresses shown

below.

6.2.4.1

BG Mode 3 (32,768 colors, 240X160 dots, 1 frame buffer)

Because there is a single frame buffer, this mode is used mainly for still

images.

However, it enables 32,768 colors to be displayed simultaneously

over the full screen.

236

237

238

239

1D8h

1Dah

1DCh

1DEh

1E0h

1E2h

1E4h

1E6h

1E8h

3B8h

3Bah

3BCh

3BEh

3C0h

3C2h

3C4h

3C6h

3C8h

598h

59Ah

59Ch

59Eh

5A0h

5A2h

5A4h

5A6h

5A8h

778h

77Ah

77Ch

77Eh

780h

782h

784h

786h

788h

958h

95Ah

95Ch

95Eh

156

12480h

12482h

12484h

12486h

12488h

12658h

1265Ah

1265Ch

1265Eh

157

12660h

12662h

12664h

12666h

12668h

12838h

1283Ah

1283Ch

1283Eh

158

12840h

12842h

12844h

12846h

12848h

12A18h

12A1Ah

12A1Ch

12A1Eh

159

12A20h

12A22h

12A24h

12A26h

12A28h

12BF8h

12BFAh

12BFCh

12BFEh

VRAM address (+06000000h)