Nintendo 1504166 Programming Manual - Page 23

Access Timing, The following timing charts illustrate Game Pak ROM access with 3 wait

Page 23 highlights

AGB Programming Manual AGB Memory 3.3.1 Access Timing The following timing charts illustrate Game Pak ROM access with 3 wait cycles on the first access and 1 wait cycle on the second. 1) Sequential Access System Clock 16.78 MHz Wait Cycles wait wait wait wait wait AD Bus Address Data Data Data 1st Access (3 wait cycles) 2nd Access (1 wait cycle) 3rd Access (1 wait cycle) 2) Random Access System Clock 16.78 MHz Wait Cycles wait wait wait wait wait wait AD Bus Address Data Address Data 1st Access (3 wait cycles) 1st Access (3 wait cycles) ©1999 - 2001 Nintendo of America Inc. 23 D.C.N. AGB-06-0001-002B4

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AGB Programming Manual
AGB Memory
©1999 - 2001 Nintendo of America Inc.
23
D.C.N. AGB-06-0001-002B4
3.3.1 Access Timing
The following timing charts illustrate Game Pak ROM access with 3 wait
cycles on the first access and 1 wait cycle on the second.
1)
Sequential Access
1st Access
(3 wait cycles)
2nd Access
(1 wait cycle)
3rd Access
(1 wait cycle)
System Clock
16.78 MHz
Wait Cycles
AD Bus
wait
wait
wait
Address
Data
Data
wait
Data
wait
2)
Random Access
1st Access
(3 wait cycles)
1st Access
(3 wait cycles)
System Clock
16.78 MHz
Wait Cycles
AD Bus
wait
wait
wait
Address
Data
wait
Data
wait
wait
Address