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Sound 3, SOUND3CNT_L [d05] Waveform RAM Data Association Specification

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AGB Programming Manual Sound 10.5 Sound 3 The Sound 3 circuit outputs arbitrary waveforms and can automatically read waveform patterns (1 cycle) in waveform RAM and output them while modifying their length, frequency, and level. The capacity of the waveform RAM of Sound 3 in AGB (total of 64 steps) is twice that in CGB, and can be used as 2 banks of 32 steps or as 64 steps. In addition, a new output level of 3/4 output can now be selected. The contents of NR30, NR31, NR32, NR33, NR34 for Sound 3, add the functionalities listed above to those of CGB. Address Register 15 14 13 12 11 10 09 08 07 06 05 04 03 02 01 00 Attributes Initial Value 070h SOUND3 NR30 R/W 0000h CNT_L Waveform RAM Data Association Spec. 0: 32 Steps 1: 64 Steps Waveform RAM Bank Specification 0: Bank 0 1: Bank 1 Sound Output Flag 0: Stop Output 1: Output SOUND3CNT_L [d07] Sound Output Flag Sound output stops when 0; sound output occurs when 1. SOUND3CNT_L [d06] Waveform RAM Bank Specification Two banks of waveform RAM are provided, banks 0 and 1. The Sound 3 circuit plays the waveform data in the specified bank. When waveform RAM is accessed by the user, the bank not specified is accessed. SOUND3CNT_L [d05] Waveform RAM Data Association Specification When 0 is specified, 32-step waveform pattern is constructed under normal operation. With a setting of 1, the data in the bank specified by NR30 [d06] (waveform RAM bank specification) is played, followed immediately by the data in the back bank. The front bank 32 steps and the back bank 32 steps combine to form a waveform pattern with a total of 64 steps. ©1999 - 2001 Nintendo of America Inc. 93 D.C.N. AGB-06-0001-002B4

Section	Page
Introduction	3
Revision History	4
Table of Contents	9
Using This Manual	12
1 AGB System	13
1.1 System Overview	13
2 System Configuration	15
2.1 CPU Block Diagram	15
2.2 Complete Block Diagram	16
2.3 Memory Configuration and Access Width	17
2.4 Little-Endian	17
3 AGB Memory	18
3.1 Overall Memory Map	18
3.2 Memory Configuration	19
3.2.1 AGB Internal Memory	19
3.2.2 Game Pak Memory	20
3.3 Game Pak Memory Wait Control	21
3.3.1 Access Timing	23
3.3.2 Game Pak Bus	24
4 LCD	25
4.1 LCD Status	26
4.1.1 V Counter	26
4.1.2 General LCD Status	27
5 Image System	29
5.1 BG Modes	31
5.1.1 Details of BG Modes	31
5.1.2 VRAM Memory Map	32
6 Rendering Functions	33
6.1 Character Mode BG (BG Modes 0-2)	33
6.1.1 BG Control	33
6.1.2 Mosaic Size	39
6.1.3 VRAM Address Mapping of BG Data	40
6.1.4 Character Data Format	42
6.1.5 BG Screen Data Format	43
6.1.6 BG Screen Data Address Mapping for the LCD Screen	45
6.1.7 BG Rotation and Scaling Features	49
6.1.8 BG Scrolling	52
6.2 Bitmap Mode BGs (BG Modes 3-5)	53
6.2.1 BG Control	53
6.2.2 BG Rotation/Scaling	54
6.2.3 Pixel Data	54
6.2.4 Pixel Data Address Mapping for the LCD Screen	55
6.2.4.1 BG Mode 3 (32,768 colors,240x160 dots,1 frame buffer)	55
6.2.4.2 BG Mode 4 (256 colors,240x160 dots,2 frame buffers)	56
6.2.4.3 BG Mode 5 (32,768 colors,160x128 dots,2 frame buffers)	57
6.3 OBJ (Object)	58
6.3.1 OBJ Function Overview	58
6.3.2 Character Data Mapping	60
6.3.3 OAM	62
6.3.4 OBJ Rotation/Scaling Feature	70
6.4 Display Priority of OBJ and BG	72
7 Color Palettes	73
7.1 Color Palette Overview	73
7.2 Color Palette RAM	74
7.3 Color Data Format	76
8 Window Feature	77
8.1 Window Position Setting	77
8.2 Window Control	78
9 Color Special Effects	80
9.1 Selection of Color Special Effects	80
9.2 Color Special Effects Processing	82
10 Sound	84
10.1 Sound Block Diagram	84
10.2 Direct Sounds A and B	85
10.3 Sound 1	87
10.4 Sound 2	91
10.5 Sound 3	93
10.6 Sound 4	97
10.7 Sound Control	100
10.8 Sound PWM Control	104
11 Timer	106
12 DMA Transfer	108
12.1 DMA 0	109
12.2 DMA 1 and 2	113
12.3 DMA 3	117
12.4 DMA Problems: How to avoid them	122
13 Communication Functions	125
13.1 8-Bit/32-Bit Normal Serial Communication	128
13.2 16-Bit Multi-player Communication	134
13.3 UART Communication Functions	142
13.4 General Purpose Communication	148
13.5 JOY Bus Communication	150
13.6 AGB Game Link Cable	154
14 Key Input	155
14.1 Key Status	155
14.2 Key Interrupt Control	155
14.2.1 Interrupt Conditions	156
15 Interrupt Control	157
15.1 System-Allocated Area in Work RAM	159
15.2 Interrupt Operation	160
15.2.1 Normal Interrupt	160
15.2.2 Multiple Interrupts	161
16 Power-Down Functions	163
16.1 Stop Function	163
16.2 Halt Function	164
17 AGB System Calls	165
17.1 System Call Operation	165
17.1.1 Normal Calls	165
17.1.2 Multiple Calls	167