Toshiba Portege M100 Maintenance Manual - Page 65

2.4 System Board Troubleshooting 2 Troubleshooting Procedures Table 2-4 Printer port LED boot mode status (2/5) LED Status B7h Test item BIOS rewriting check 00h IRT Check system 01h Memory check SM-RAM stack area test 02h CMOS check and initialization 03h Resume branch 04h SMRAM initialization 05h Storage of CPU state map 06h Advance processing before initializing PCI bus Message Key input check Check sum error check Signature error check IRT Check system Protecting cache Special register, Intel chip set initialization PIT ch.1 initialization DRAM type and size check SM-RAM stack area test Enabling L1 cache CMOS access test CMOS battery level check CMOS checksum CMOS data initialization (1) Set IRT status DRAM size storing in CMOS Resume branch check SM-RAM checksum SMI control flag clear System BIOS RAM area checksum System BIOS ROM to RAM copy SMRAM initialization Wake Up check SMRAM base rewrite and BIOS CPU state map store Set SMI handler to runtime Rewriting of SRAM base Storage of CPU s tate map Setting of device necessary before initializing of PCI bus PORTEGE M100 Maintenance Manual (960-452) 2-23