Brother International HL-3400CN Service Manual - Page 99

CHAPTER 4 STRUCTURE OF SYSTEM COMPONENTS 2.3.2 Circuit (1) CPU block • Model name: µPD30210-167 (VR4310-167MHz), MiPS 64 bits RISC CPU manufactured by NEC • Clock speed: 66.7MHz (external) / 166.75MHz (internal) • Cache memory: 16KB (Command cache) / 8KB (Data cache) • Bus width: 64 bits (external) / 32 bits (internal), Floating point unit (FPU) incorporated • Appearance: 120-pin QFP (2) ASIC block • Model name: MF87F4561 manufactured by Fujitsu • Appearance: 420-pin BGA • Functions: * Controls CPU * Controls memory * Controls interrupts * Timer * External interfaces (Centronics, BR-NET, iDE, PCMCIA, MIO) * Engine interface (Video signal control) * Supports Software (3) Gate array block • Model name: • Appearance: • Functions: SLA5099H F0J manufactured by Epson 160-pin QFP Engine control, RS-232C (4) ROM block The ROM stores the CPU control program and font data. ROMs used are an 8Mbytes masked ROM, and a 8 Mbytes flash ROM which can be rewritten on the board. • Access time: • Appearance: • Model name: • Access time: • Appearance: less than 120nsec. (Page access less than 50nsec.) 44-pin SOP MBM29DL32BD-90 manufactured Fujitsu less than 90nsec. 48-pin TSOP (5) DRAM block DRAMs are used for the receiving buffer and the working area of the CPU. The DRAM block contains eight 64M bit SDRAM, thus having 64MB memory capacity in total. • Model name: • Type: • Access time: • Appearance: HM5264805FIT manufactured Hitachi (or equivalent) 64Mbit SDRAM CL2 PC66 compatible or more. 54-pin TSOP 4-48